diff options
| -rw-r--r-- | lib/Transforms/InstCombine/InstCombineAndOrXor.cpp | 15 | ||||
| -rw-r--r-- | test/Transforms/InstCombine/crash.ll | 11 |
2 files changed, 21 insertions, 5 deletions
diff --git a/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp b/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp index f0ddfe3fe1..9de73bada7 100644 --- a/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp +++ b/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp @@ -1142,19 +1142,24 @@ static Instruction *MatchSelectFromAndOr(Value *A, Value *B, Value *C, Value *D) { // If A is not a select of -1/0, this cannot match. Value *Cond = 0; - if (!match(A, m_SExt(m_Value(Cond)))) + if (!match(A, m_SExt(m_Value(Cond))) || + !Cond->getType()->isInteger(1)) return 0; // ((cond?-1:0)&C) | (B&(cond?0:-1)) -> cond ? C : B. - if (match(D, m_Not(m_SExt(m_Specific(Cond))))) + if (match(D, m_Not(m_SExt(m_Specific(Cond)))) && + Cond->getType()->isInteger(1)) return SelectInst::Create(Cond, C, B); - if (match(D, m_SExt(m_Not(m_Specific(Cond))))) + if (match(D, m_SExt(m_Not(m_Specific(Cond)))) && + Cond->getType()->isInteger(1)) return SelectInst::Create(Cond, C, B); // ((cond?-1:0)&C) | ((cond?0:-1)&D) -> cond ? C : D. - if (match(B, m_Not(m_SExt(m_Specific(Cond))))) + if (match(B, m_Not(m_SExt(m_Specific(Cond)))) && + Cond->getType()->isInteger(1)) return SelectInst::Create(Cond, C, D); - if (match(B, m_SExt(m_Not(m_Specific(Cond))))) + if (match(B, m_SExt(m_Not(m_Specific(Cond)))) && + Cond->getType()->isInteger(1)) return SelectInst::Create(Cond, C, D); return 0; } diff --git a/test/Transforms/InstCombine/crash.ll b/test/Transforms/InstCombine/crash.ll index a4e6a62d9e..2faa5392d4 100644 --- a/test/Transforms/InstCombine/crash.ll +++ b/test/Transforms/InstCombine/crash.ll @@ -226,3 +226,14 @@ define void @test10a() { ret void } + +; PR6193 +define i32 @test11(i32 %aMaskWidth, i8 %aStride) nounwind { +entry: + %conv41 = sext i8 %aStride to i32 + %neg = xor i32 %conv41, -1 + %and42 = and i32 %aMaskWidth, %neg + %and47 = and i32 130, %conv41 + %or = or i32 %and42, %and47 + ret i32 %or +} |