diff options
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 2 | ||||
| -rw-r--r-- | test/MC/ARM/basic-thumb2-instructions.s | 18 |
2 files changed, 20 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 245536f945..72793e0e33 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -4944,6 +4944,8 @@ def : MnemonicAlias<"srs", "srsia">; // QSAX == QSUBADDX def : MnemonicAlias<"qsubaddx", "qsax">; +// SASX == SADDSUBX +def : MnemonicAlias<"saddsubx", "sasx">; // LDRSBT/LDRHT/LDRSHT post-index offset if optional. // Note that the write-back output register is a dummy operand for MC (it's diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s index 0d5d2d3192..3011ab768d 100644 --- a/test/MC/ARM/basic-thumb2-instructions.s +++ b/test/MC/ARM/basic-thumb2-instructions.s @@ -1579,6 +1579,24 @@ _func: @------------------------------------------------------------------------------ +@ SASX +@------------------------------------------------------------------------------ + saddsubx r9, r2, r7 + it ne + saddsubxne r2, r5, r6 + sasx r9, r2, r7 + it ne + sasxne r2, r5, r6 + +@ CHECK: sasx r9, r2, r7 @ encoding: [0xa2,0xfa,0x07,0xf9] +@ CHECK: it ne @ encoding: [0x18,0xbf] +@ CHECK: sasxne r2, r5, r6 @ encoding: [0xa5,0xfa,0x06,0xf2] +@ CHECK: sasx r9, r2, r7 @ encoding: [0xa2,0xfa,0x07,0xf9] +@ CHECK: it ne @ encoding: [0x18,0xbf] +@ CHECK: sasxne r2, r5, r6 @ encoding: [0xa5,0xfa,0x06,0xf2] + + +@------------------------------------------------------------------------------ @ SUB (register) @------------------------------------------------------------------------------ sub.w r5, r2, r12, rrx |