diff options
| -rw-r--r-- | include/llvm/Target/TargetInstrInfo.h | 12 | ||||
| -rw-r--r-- | lib/CodeGen/OptimizeCmps.cpp | 10 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMBaseInstrInfo.cpp | 6 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMBaseInstrInfo.h | 12 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 3 |
5 files changed, 22 insertions, 21 deletions
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index 1c6ac1a61c..520c41be74 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -577,17 +577,17 @@ public: virtual ScheduleHazardRecognizer* CreateTargetPostRAHazardRecognizer(const InstrItineraryData&) const = 0; - /// isCompareInstr - If the machine instruction is a comparison instruction, - /// then return true. Also return the source register in SrcReg and the value - /// it compares against in CmpValue. - virtual bool isCompareInstr(const MachineInstr *MI, + /// AnalyzeCompare - For a comparison instruction, return the source register + /// in SrcReg and the value it compares against in CmpValue. Return true if + /// the comparison instruction can be analyzed. + virtual bool AnalyzeCompare(const MachineInstr *MI, unsigned &SrcReg, int &CmpValue) const { return false; } - /// convertToSetZeroFlag - Convert the instruction to set the zero flag so + /// ConvertToSetZeroFlag - Convert the instruction to set the zero flag so /// that we can remove a "comparison with zero". - virtual bool convertToSetZeroFlag(MachineInstr *Instr, + virtual bool ConvertToSetZeroFlag(MachineInstr *Instr, MachineInstr *CmpInstr) const { return false; } diff --git a/lib/CodeGen/OptimizeCmps.cpp b/lib/CodeGen/OptimizeCmps.cpp index 5b524cd641..209c8b9504 100644 --- a/lib/CodeGen/OptimizeCmps.cpp +++ b/lib/CodeGen/OptimizeCmps.cpp @@ -72,9 +72,8 @@ bool OptimizeCmps::OptimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB) { // physical register, we can try to optimize it. unsigned SrcReg; int CmpValue; - if (!TII->isCompareInstr(MI, SrcReg, CmpValue) || - TargetRegisterInfo::isPhysicalRegister(SrcReg) || - CmpValue != 0) + if (!TII->AnalyzeCompare(MI, SrcReg, CmpValue) || + TargetRegisterInfo::isPhysicalRegister(SrcReg) || CmpValue != 0) return false; MachineRegisterInfo::def_iterator DI = MRI->def_begin(SrcReg); @@ -83,7 +82,7 @@ bool OptimizeCmps::OptimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB) { return false; // Attempt to convert the defining instruction to set the "zero" flag. - if (TII->convertToSetZeroFlag(&*DI, MI)) { + if (TII->ConvertToSetZeroFlag(&*DI, MI)) { ++NumEliminated; return true; } @@ -104,7 +103,8 @@ bool OptimizeCmps::runOnMachineFunction(MachineFunction &MF) { for (MachineBasicBlock::iterator MII = MBB->begin(), ME = MBB->end(); MII != ME; ) { MachineInstr *MI = &*MII++; - Changed |= OptimizeCmpInstr(MI, MBB); + if (MI->getDesc().isCompare()) + Changed |= OptimizeCmpInstr(MI, MBB); } } diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index 68e35ed75e..7e1c84e1a6 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -1355,7 +1355,7 @@ bool llvm::rewriteARMFrameIndex(MachineInstr &MI, unsigned FrameRegIdx, } bool ARMBaseInstrInfo:: -isCompareInstr(const MachineInstr *MI, unsigned &SrcReg, int &CmpValue) const { +AnalyzeCompare(const MachineInstr *MI, unsigned &SrcReg, int &CmpValue) const { switch (MI->getOpcode()) { default: break; case ARM::t2CMPri: @@ -1368,10 +1368,10 @@ isCompareInstr(const MachineInstr *MI, unsigned &SrcReg, int &CmpValue) const { return false; } -/// convertToSetZeroFlag - Convert the instruction to set the "zero" flag so +/// ConvertToSetZeroFlag - Convert the instruction to set the "zero" flag so /// that we can remove a "comparison with zero". bool ARMBaseInstrInfo:: -convertToSetZeroFlag(MachineInstr *MI, MachineInstr *CmpInstr) const { +ConvertToSetZeroFlag(MachineInstr *MI, MachineInstr *CmpInstr) const { // Conservatively refuse to convert an instruction which isn't in the same BB // as the comparison. if (MI->getParent() != CmpInstr->getParent()) diff --git a/lib/Target/ARM/ARMBaseInstrInfo.h b/lib/Target/ARM/ARMBaseInstrInfo.h index 4f1c453924..2547ad1c22 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.h +++ b/lib/Target/ARM/ARMBaseInstrInfo.h @@ -337,15 +337,15 @@ public: return NumInstrs && NumInstrs == 1; } - /// isCompareInstr - If the machine instruction is a comparison instruction, - /// then return true. Also return the source register in SrcReg and the value - /// it compares against in CmpValue. - virtual bool isCompareInstr(const MachineInstr *MI, unsigned &SrcReg, + /// AnalyzeCompare - For a comparison instruction, return the source register + /// in SrcReg and the value it compares against in CmpValue. Return true if + /// the comparison instruction can be analyzed. + virtual bool AnalyzeCompare(const MachineInstr *MI, unsigned &SrcReg, int &CmpValue) const; - /// convertToSetZeroFlag - Convert the instruction to set the zero flag so + /// ConvertToSetZeroFlag - Convert the instruction to set the zero flag so /// that we can remove a "comparison with zero". - virtual bool convertToSetZeroFlag(MachineInstr *Instr, + virtual bool ConvertToSetZeroFlag(MachineInstr *Instr, MachineInstr *CmpInstr) const; }; diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 4ec71c46e1..a73aefcacd 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -2155,11 +2155,12 @@ def : T2Pat<(or (and rGPR:$src1, 0xFFFF0000), //===----------------------------------------------------------------------===// // Comparison Instructions... // - +let isCompare = 1 in { defm t2CMP : T2I_cmp_irs<0b1101, "cmp", BinOpFrag<(ARMcmp node:$LHS, node:$RHS)>>; defm t2CMPz : T2I_cmp_irs<0b1101, "cmp", BinOpFrag<(ARMcmpZ node:$LHS, node:$RHS)>>; +} //FIXME: Disable CMN, as CCodes are backwards from compare expectations // Compare-to-zero still works out, just not the relationals |