diff options
| -rw-r--r-- | lib/Target/Sparc/SparcRegisterInfo.td | 2 | ||||
| -rw-r--r-- | lib/Target/SparcV8/SparcV8RegisterInfo.td | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/Sparc/SparcRegisterInfo.td b/lib/Target/Sparc/SparcRegisterInfo.td index 6a4da69bd6..728c115f86 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.td +++ b/lib/Target/Sparc/SparcRegisterInfo.td @@ -23,7 +23,7 @@ include "../SparcRegisterInfo.td" // FIXME: the register order should be defined in terms of the preferred // allocation order... // -def IntRegs : RegisterClass<i64, 64, [L0, L1, L2, L3, L4, L5, L6, L7, +def IntRegs : RegisterClass<i32, 64, [L0, L1, L2, L3, L4, L5, L6, L7, I0, I1, I2, I3, I4, I5, G1, G2, G3, G4, G5, G6, G7, O0, O1, O2, O3, O4, O5, O7, diff --git a/lib/Target/SparcV8/SparcV8RegisterInfo.td b/lib/Target/SparcV8/SparcV8RegisterInfo.td index 6a4da69bd6..728c115f86 100644 --- a/lib/Target/SparcV8/SparcV8RegisterInfo.td +++ b/lib/Target/SparcV8/SparcV8RegisterInfo.td @@ -23,7 +23,7 @@ include "../SparcRegisterInfo.td" // FIXME: the register order should be defined in terms of the preferred // allocation order... // -def IntRegs : RegisterClass<i64, 64, [L0, L1, L2, L3, L4, L5, L6, L7, +def IntRegs : RegisterClass<i32, 64, [L0, L1, L2, L3, L4, L5, L6, L7, I0, I1, I2, I3, I4, I5, G1, G2, G3, G4, G5, G6, G7, O0, O1, O2, O3, O4, O5, O7, |