diff options
| -rw-r--r-- | include/llvm/Target/TargetRegisterInfo.h | 2 | ||||
| -rw-r--r-- | lib/Target/TargetRegisterInfo.cpp | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h index 390b95fbe2..e90fc6cccc 100644 --- a/include/llvm/Target/TargetRegisterInfo.h +++ b/include/llvm/Target/TargetRegisterInfo.h @@ -325,7 +325,7 @@ public: /// getAllocatableSet - Returns a bitset indexed by register number /// indicating if a register is allocatable or not. If a register class is /// specified, returns the subset for the class. - BitVector getAllocatableSet(MachineFunction &MF, + BitVector getAllocatableSet(const MachineFunction &MF, const TargetRegisterClass *RC = NULL) const; const TargetRegisterDesc &operator[](unsigned RegNo) const { diff --git a/lib/Target/TargetRegisterInfo.cpp b/lib/Target/TargetRegisterInfo.cpp index 43123991ea..fac67e2e1a 100644 --- a/lib/Target/TargetRegisterInfo.cpp +++ b/lib/Target/TargetRegisterInfo.cpp @@ -62,14 +62,14 @@ TargetRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, EVT VT) const { /// getAllocatableSetForRC - Toggle the bits that represent allocatable /// registers for the specific register class. -static void getAllocatableSetForRC(MachineFunction &MF, +static void getAllocatableSetForRC(const MachineFunction &MF, const TargetRegisterClass *RC, BitVector &R){ for (TargetRegisterClass::iterator I = RC->allocation_order_begin(MF), E = RC->allocation_order_end(MF); I != E; ++I) R.set(*I); } -BitVector TargetRegisterInfo::getAllocatableSet(MachineFunction &MF, +BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF, const TargetRegisterClass *RC) const { BitVector Allocatable(NumRegs); if (RC) { |