diff options
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.h | 12 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/thumb2-sbc.ll | 4 |
2 files changed, 8 insertions, 8 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.h b/lib/Target/ARM/ARMISelLowering.h index cfe2cf126d..6fc77cff2d 100644 --- a/lib/Target/ARM/ARMISelLowering.h +++ b/lib/Target/ARM/ARMISelLowering.h @@ -88,7 +88,7 @@ namespace llvm { MEMBARRIER_MCR, // Memory barrier (MCR) PRELOAD, // Preload - + VCEQ, // Vector compare equal. VCEQZ, // Vector compare equal to zero. VCGE, // Vector compare greater than or equal. @@ -173,7 +173,7 @@ namespace llvm { // Bit-field insert BFI, - + // Vector OR with immediate VORRIMM, // Vector AND with NOT of immediate @@ -408,7 +408,7 @@ namespace llvm { SDValue LowerShiftRightParts(SDValue Op, SelectionDAG &DAG) const; SDValue LowerShiftLeftParts(SDValue Op, SelectionDAG &DAG) const; SDValue LowerFLT_ROUNDS_(SDValue Op, SelectionDAG &DAG) const; - SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG, + SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *ST) const; SDValue ReconstructShuffle(SDValue Op, SelectionDAG &DAG) const; @@ -486,14 +486,14 @@ namespace llvm { unsigned BinOpcode) const; }; - + enum NEONModImmType { VMOVModImm, VMVNModImm, OtherModImm }; - - + + namespace ARM { FastISel *createFastISel(FunctionLoweringInfo &funcInfo); } diff --git a/test/CodeGen/Thumb2/thumb2-sbc.ll b/test/CodeGen/Thumb2/thumb2-sbc.ll index de6502d2e6..09e3fdd853 100644 --- a/test/CodeGen/Thumb2/thumb2-sbc.ll +++ b/test/CodeGen/Thumb2/thumb2-sbc.ll @@ -39,7 +39,7 @@ define i64 @f5(i64 %a) { ; CHECK: f5 ; CHECK: subs r0, #2 ; CHECK: adc r1, r1, #-1448498775 - %tmp = sub i64 %a, 6221254862626095106 + %tmp = sub i64 %a, 6221254862626095106 ret i64 %tmp } @@ -48,7 +48,7 @@ define i64 @f6(i64 %a) { ; CHECK: f6 ; CHECK: subs r0, #2 ; CHECK: sbc r1, r1, #66846720 - %tmp = sub i64 %a, 287104476244869122 + %tmp = sub i64 %a, 287104476244869122 ret i64 %tmp } |