diff options
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 4 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMRegisterInfo.cpp | 11 |
2 files changed, 12 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 4cf5acce84..6c216f24e9 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -76,3 +76,7 @@ def movri : InstARM<(ops IntRegs:$dst, i32imm:$src), def addri : InstARM<(ops IntRegs:$dst, IntRegs:$a, i32imm:$b), "add $dst, $a, $b", [(set IntRegs:$dst, (add IntRegs:$a, imm:$b))]>; + +def subri : InstARM<(ops IntRegs:$dst, IntRegs:$a, i32imm:$b), + "sub $dst, $a, $b", + [(set IntRegs:$dst, (sub IntRegs:$a, imm:$b))]>; diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp index 8daf065794..a9fe705667 100644 --- a/lib/Target/ARM/ARMRegisterInfo.cpp +++ b/lib/Target/ARM/ARMRegisterInfo.cpp @@ -117,14 +117,17 @@ processFunctionBeforeFrameFinalized(MachineFunction &MF) const {} void ARMRegisterInfo::emitPrologue(MachineFunction &MF) const { MachineBasicBlock &MBB = MF.front(); + MachineBasicBlock::iterator MBBI = MBB.begin(); MachineFrameInfo *MFI = MF.getFrameInfo(); int NumBytes = (int) MFI->getStackSize(); //hack assert(NumBytes == 0); - //add a sp = sp - 4 - BuildMI(MBB, MBB.begin(), ARM::str, 1, ARM::R14).addReg(ARM::R13); + //sub sp, sp, #4 + BuildMI(MBB, MBBI, ARM::subri, 2, ARM::R13).addReg(ARM::R13).addImm(4); + //str lr, [sp] + BuildMI(MBB, MBBI, ARM::str, 1, ARM::R14).addReg(ARM::R13); } void ARMRegisterInfo::emitEpilogue(MachineFunction &MF, @@ -138,8 +141,10 @@ void ARMRegisterInfo::emitEpilogue(MachineFunction &MF, //hack assert(NumBytes == 0); + //ldr lr, [sp] BuildMI(MBB, MBBI, ARM::ldr, 2, ARM::R14).addImm(0).addReg(ARM::R13); - //add a sp = sp + 4 + //add sp, sp, #4 + BuildMI(MBB, MBBI, ARM::addri, 2, ARM::R13).addReg(ARM::R13).addImm(4); } unsigned ARMRegisterInfo::getRARegister() const { |