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-rw-r--r--include/llvm/CodeGen/ScheduleDAG.h11
-rw-r--r--lib/CodeGen/SelectionDAG/ScheduleDAG.cpp21
2 files changed, 15 insertions, 17 deletions
diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h
index 78eb7a55d9..e86d08492a 100644
--- a/include/llvm/CodeGen/ScheduleDAG.h
+++ b/include/llvm/CodeGen/ScheduleDAG.h
@@ -315,13 +315,14 @@ namespace llvm {
static unsigned CountResults(SDNode *Node);
/// CountOperands - The inputs to target nodes have any actual inputs first,
- /// followed by optional memory operands chain operand, then flag operands.
- /// Compute the number of actual operands that will go into the machine
- /// instr.
+ /// followed by special operands that describe memory references, then an
+ /// optional chain operand, then flag operands. Compute the number of
+ /// actual operands that will go into the resulting MachineInstr.
static unsigned CountOperands(SDNode *Node);
- /// CountMemOperands - Find the index of the last MemOperandSDNode
- static unsigned CountMemOperands(SDNode *Node);
+ /// ComputeMemOperandsEnd - Find the index one past the last
+ /// MemOperandSDNode operand
+ static unsigned ComputeMemOperandsEnd(SDNode *Node);
/// EmitNode - Generate machine code for an node and needed dependencies.
/// VRBaseMap contains, for each already emitted node, the first virtual
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index e798015690..da79a991c2 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -279,22 +279,19 @@ unsigned ScheduleDAG::CountResults(SDNode *Node) {
}
/// CountOperands - The inputs to target nodes have any actual inputs first,
-/// followed by optional memory operands chain operand, then flag operands.
-/// Compute the number of actual operands that will go into the resulting
-/// MachineInstr.
+/// followed by special operands that describe memory references, then an
+/// optional chain operand, then flag operands. Compute the number of
+/// actual operands that will go into the resulting MachineInstr.
unsigned ScheduleDAG::CountOperands(SDNode *Node) {
- unsigned N = Node->getNumOperands();
- while (N && Node->getOperand(N - 1).getValueType() == MVT::Flag)
- --N;
- if (N && Node->getOperand(N - 1).getValueType() == MVT::Other)
- --N; // Ignore chain if it exists.
+ unsigned N = ComputeMemOperandsEnd(Node);
while (N && isa<MemOperandSDNode>(Node->getOperand(N - 1).Val))
--N; // Ignore MemOperand nodes
return N;
}
-/// CountMemOperands - Find the index of the last MemOperandSDNode operand
-unsigned ScheduleDAG::CountMemOperands(SDNode *Node) {
+/// ComputeMemOperandsEnd - Find the index one past the last MemOperandSDNode
+/// operand
+unsigned ScheduleDAG::ComputeMemOperandsEnd(SDNode *Node) {
unsigned N = Node->getNumOperands();
while (N && Node->getOperand(N - 1).getValueType() == MVT::Flag)
--N;
@@ -698,7 +695,7 @@ void ScheduleDAG::EmitNode(SDNode *Node, unsigned InstanceNo,
unsigned NumResults = CountResults(Node);
unsigned NodeOperands = CountOperands(Node);
- unsigned NodeMemOperands = CountMemOperands(Node);
+ unsigned MemOperandsEnd = ComputeMemOperandsEnd(Node);
unsigned NumMIOperands = NodeOperands + NumResults;
bool HasPhysRegOuts = (NumResults > II.getNumDefs()) &&
II.getImplicitDefs() != 0;
@@ -722,7 +719,7 @@ void ScheduleDAG::EmitNode(SDNode *Node, unsigned InstanceNo,
AddOperand(MI, Node->getOperand(i), i+II.getNumDefs(), &II, VRBaseMap);
// Emit all of the memory operands of this instruction
- for (unsigned i = NodeOperands; i != NodeMemOperands; ++i)
+ for (unsigned i = NodeOperands; i != MemOperandsEnd; ++i)
AddMemOperand(MI, cast<MemOperandSDNode>(Node->getOperand(i))->MO);
// Commute node if it has been determined to be profitable.