diff options
| -rw-r--r-- | lib/Target/ARM/ARMAsmPrinter.cpp | 34 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 4 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb.td | 4 |
3 files changed, 36 insertions, 6 deletions
diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp index 8fa7131267..7bf7642143 100644 --- a/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/ARMAsmPrinter.cpp @@ -1210,6 +1210,16 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { OS << '\t'; printRegisterList(MI, 5, OS); } else + // TRAP and tTRAP need special handling for non-Darwin. The GNU binutils + // don't (yet) support the 'trap' mnemonic. (Use decimal, not hex, to + // be consistent with the MC instruction printer.) + // FIXME: This really should be in AsmPrinter/ARMInstPrinter.cpp, not here. + // Need a way to ask "isTargetDarwin()" there, first, though. + if (MI->getOpcode() == ARM::TRAP && !Subtarget->isTargetDarwin()) { + OS << "\t.long\t2147348462\t\t" << MAI->getCommentString() << "trap"; + } else if (MI->getOpcode() == ARM::tTRAP && !Subtarget->isTargetDarwin()) { + OS << "\t.short\t57086\t\t\t" << MAI->getCommentString() << " trap"; + } else printInstruction(MI, OS); // Output the instruction to the stream @@ -1714,6 +1724,30 @@ void ARMAsmPrinter::printInstructionThroughMCStreamer(const MachineInstr *MI) { EmitJumpTable(MI); return; } + case ARM::TRAP: { + // Non-Darwin binutils don't yet support the "trap" mnemonic. + // FIXME: Remove this special case when they do. + if (!Subtarget->isTargetDarwin()) { + //.long 0xe7ffdefe ${:comment} trap + uint32_t Val = 0xe7ffdefee; + OutStreamer.AddComment("trap"); + OutStreamer.EmitIntValue(Val, 4); + return; + } + break; + } + case ARM::tTRAP: { + // Non-Darwin binutils don't yet support the "trap" mnemonic. + // FIXME: Remove this special case when they do. + if (!Subtarget->isTargetDarwin()) { + //.long 0xe7ffdefe ${:comment} trap + uint32_t Val = 0xdefe; + OutStreamer.AddComment("trap"); + OutStreamer.EmitIntValue(Val, 2); + return; + } + break; + } } MCInst TmpInst; diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index a046ecab12..671a29bb01 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -815,11 +815,9 @@ def DBG : AI<(outs), (ins i32imm:$opt), MiscFrm, NoItinerary, "dbg", "\t$opt", } // A5.4 Permanently UNDEFINED instructions. -// FIXME: Temporary emitted as raw bytes until this pseudo-op will be added to -// binutils let isBarrier = 1, isTerminator = 1 in def TRAP : AXI<(outs), (ins), MiscFrm, NoItinerary, - ".long 0xe7ffdefe ${:comment} trap", [(trap)]>, + "trap", [(trap)]>, Requires<[IsARM]> { let Inst{27-25} = 0b011; let Inst{24-20} = 0b11111; diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index 7f43fa70ef..015054b3da 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -411,11 +411,9 @@ def tSVC : T1pI<(outs), (ins i32imm:$svc), IIC_Br, "svc", "\t$svc", []>, // A8.6.16 B: Encoding T1 // If Inst{11-8} == 0b1110 then UNDEFINED -// FIXME: Temporary emitted as raw bytes until this pseudo-op will be added to -// binutils let isBarrier = 1, isTerminator = 1 in def tTRAP : TI<(outs), (ins), IIC_Br, - ".short 0xdefe ${:comment} trap", [(trap)]>, Encoding16 { + "trap", [(trap)]>, Encoding16 { let Inst{15-12} = 0b1101; let Inst{11-8} = 0b1110; } |