diff options
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 2 | ||||
-rw-r--r-- | test/CodeGen/X86/2008-06-18-BadShuffle.ll | 10 |
2 files changed, 10 insertions, 2 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 4211508225..79629240b3 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -3445,8 +3445,6 @@ SDOperand LowerVECTOR_SHUFFLEv8i16(SDOperand V1, SDOperand V2, continue; SDOperand Elt = MaskElts[i]; unsigned EltIdx = cast<ConstantSDNode>(Elt)->getValue(); - if (EltIdx == i) - continue; SDOperand ExtOp = (EltIdx < 8) ? DAG.getNode(ISD::EXTRACT_VECTOR_ELT, MVT::i16, V1, DAG.getConstant(EltIdx, PtrVT)) diff --git a/test/CodeGen/X86/2008-06-18-BadShuffle.ll b/test/CodeGen/X86/2008-06-18-BadShuffle.ll new file mode 100644 index 0000000000..ba0a1f90ab --- /dev/null +++ b/test/CodeGen/X86/2008-06-18-BadShuffle.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=x86 -mcpu=i386 -mattr=+sse2 | grep pinsrw + +; Test to make sure we actually insert the bottom element of the vector +define <8 x i16> @a(<8 x i16> %a) nounwind { +entry: + shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32> < i32 0, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8 > + %add = add <8 x i16> %0, %a + ret <8 x i16> %add +} + |