diff options
| -rw-r--r-- | lib/Target/X86/InstSelectSimple.cpp | 23 | ||||
| -rw-r--r-- | lib/Target/X86/X86ISelSimple.cpp | 23 |
2 files changed, 34 insertions, 12 deletions
diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp index ad52353758..25f67ecca6 100644 --- a/lib/Target/X86/InstSelectSimple.cpp +++ b/lib/Target/X86/InstSelectSimple.cpp @@ -1107,10 +1107,18 @@ void ISel::emitSelectOperation(MachineBasicBlock *MBB, void ISel::promote32(unsigned targetReg, const ValueRecord &VR) { bool isUnsigned = VR.Ty->isUnsigned(); + Value *Val = VR.Val; + const Type *Ty = VR.Ty; + if (Val) + if (Constant *C = dyn_cast<Constant>(Val)) { + Val = ConstantExpr::getCast(C, Type::IntTy); + Ty = Type::IntTy; + } + // Make sure we have the register number for this value... - unsigned Reg = VR.Val ? getReg(VR.Val) : VR.Reg; + unsigned Reg = Val ? getReg(Val) : VR.Reg; - switch (getClassB(VR.Ty)) { + switch (getClassB(Ty)) { case cByte: // Extend value into target register (8->32) if (isUnsigned) @@ -1152,27 +1160,30 @@ void ISel::visitReturnInst(ReturnInst &I) { } Value *RetVal = I.getOperand(0); - unsigned RetReg = getReg(RetVal); switch (getClassB(RetVal->getType())) { case cByte: // integral return values: extend or move into EAX and return case cShort: case cInt: - promote32(X86::EAX, ValueRecord(RetReg, RetVal->getType())); + promote32(X86::EAX, ValueRecord(RetVal)); // Declare that EAX is live on exit BuildMI(BB, X86::IMPLICIT_USE, 2).addReg(X86::EAX).addReg(X86::ESP); break; - case cFP: // Floats & Doubles: Return in ST(0) + case cFP: { // Floats & Doubles: Return in ST(0) + unsigned RetReg = getReg(RetVal); BuildMI(BB, X86::FpSETRESULT, 1).addReg(RetReg); // Declare that top-of-stack is live on exit BuildMI(BB, X86::IMPLICIT_USE, 2).addReg(X86::ST0).addReg(X86::ESP); break; - case cLong: + } + case cLong: { + unsigned RetReg = getReg(RetVal); BuildMI(BB, X86::MOV32rr, 1, X86::EAX).addReg(RetReg); BuildMI(BB, X86::MOV32rr, 1, X86::EDX).addReg(RetReg+1); // Declare that EAX & EDX are live on exit BuildMI(BB, X86::IMPLICIT_USE, 3).addReg(X86::EAX).addReg(X86::EDX) .addReg(X86::ESP); break; + } default: visitInstruction(I); } diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp index ad52353758..25f67ecca6 100644 --- a/lib/Target/X86/X86ISelSimple.cpp +++ b/lib/Target/X86/X86ISelSimple.cpp @@ -1107,10 +1107,18 @@ void ISel::emitSelectOperation(MachineBasicBlock *MBB, void ISel::promote32(unsigned targetReg, const ValueRecord &VR) { bool isUnsigned = VR.Ty->isUnsigned(); + Value *Val = VR.Val; + const Type *Ty = VR.Ty; + if (Val) + if (Constant *C = dyn_cast<Constant>(Val)) { + Val = ConstantExpr::getCast(C, Type::IntTy); + Ty = Type::IntTy; + } + // Make sure we have the register number for this value... - unsigned Reg = VR.Val ? getReg(VR.Val) : VR.Reg; + unsigned Reg = Val ? getReg(Val) : VR.Reg; - switch (getClassB(VR.Ty)) { + switch (getClassB(Ty)) { case cByte: // Extend value into target register (8->32) if (isUnsigned) @@ -1152,27 +1160,30 @@ void ISel::visitReturnInst(ReturnInst &I) { } Value *RetVal = I.getOperand(0); - unsigned RetReg = getReg(RetVal); switch (getClassB(RetVal->getType())) { case cByte: // integral return values: extend or move into EAX and return case cShort: case cInt: - promote32(X86::EAX, ValueRecord(RetReg, RetVal->getType())); + promote32(X86::EAX, ValueRecord(RetVal)); // Declare that EAX is live on exit BuildMI(BB, X86::IMPLICIT_USE, 2).addReg(X86::EAX).addReg(X86::ESP); break; - case cFP: // Floats & Doubles: Return in ST(0) + case cFP: { // Floats & Doubles: Return in ST(0) + unsigned RetReg = getReg(RetVal); BuildMI(BB, X86::FpSETRESULT, 1).addReg(RetReg); // Declare that top-of-stack is live on exit BuildMI(BB, X86::IMPLICIT_USE, 2).addReg(X86::ST0).addReg(X86::ESP); break; - case cLong: + } + case cLong: { + unsigned RetReg = getReg(RetVal); BuildMI(BB, X86::MOV32rr, 1, X86::EAX).addReg(RetReg); BuildMI(BB, X86::MOV32rr, 1, X86::EDX).addReg(RetReg+1); // Declare that EAX & EDX are live on exit BuildMI(BB, X86::IMPLICIT_USE, 3).addReg(X86::EAX).addReg(X86::EDX) .addReg(X86::ESP); break; + } default: visitInstruction(I); } |