diff options
| -rw-r--r-- | lib/Transforms/InstCombine/InstCombineShifts.cpp | 4 | ||||
| -rw-r--r-- | test/Transforms/InstCombine/pr8547.ll | 26 |
2 files changed, 28 insertions, 2 deletions
diff --git a/lib/Transforms/InstCombine/InstCombineShifts.cpp b/lib/Transforms/InstCombine/InstCombineShifts.cpp index 012d238729..9f7d98ed79 100644 --- a/lib/Transforms/InstCombine/InstCombineShifts.cpp +++ b/lib/Transforms/InstCombine/InstCombineShifts.cpp @@ -131,9 +131,9 @@ static bool CanEvaluateShifted(Value *V, unsigned NumBits, bool isLeftShift, // We can turn shl(c1)+shr(c2) -> shl(c3)+and(c4), but it isn't // profitable unless we know the and'd out bits are already zero. if (CI->getZExtValue() > NumBits) { - unsigned HighBits = CI->getZExtValue() - NumBits; + unsigned LowBits = TypeWidth - CI->getZExtValue(); if (MaskedValueIsZero(I->getOperand(0), - APInt::getHighBitsSet(TypeWidth, HighBits))) + APInt::getLowBitsSet(TypeWidth, NumBits) << LowBits)) return true; } diff --git a/test/Transforms/InstCombine/pr8547.ll b/test/Transforms/InstCombine/pr8547.ll new file mode 100644 index 0000000000..f26035c8d6 --- /dev/null +++ b/test/Transforms/InstCombine/pr8547.ll @@ -0,0 +1,26 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s +; Converting the 2 shifts to SHL 6 without the AND is wrong. PR 8547. + +@g_2 = global i32 0, align 4 +@.str = constant [10 x i8] c"g_2 = %d\0A\00" + +declare i32 @printf(i8*, ...) + +define i32 @main() nounwind { +codeRepl: + br label %for.cond + +for.cond: ; preds = %for.cond, %codeRepl + %storemerge = phi i32 [ 0, %codeRepl ], [ 5, %for.cond ] + store i32 %storemerge, i32* @g_2, align 4 + %shl = shl i32 %storemerge, 30 + %conv2 = lshr i32 %shl, 24 +; CHECK: %0 = shl i32 %storemerge, 6 +; CHECK: %conv2 = and i32 %0, 64 + %tobool = icmp eq i32 %conv2, 0 + br i1 %tobool, label %for.cond, label %codeRepl2 + +codeRepl2: ; preds = %for.cond + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([10 x i8]* @.str, i64 0, i64 0), i32 %conv2) nounwind + ret i32 0 +}
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