diff options
| -rw-r--r-- | lib/Target/Sparc/SparcAsmPrinter.cpp | 17 | ||||
| -rw-r--r-- | lib/Target/Sparc/SparcInstrInfo.td | 17 | ||||
| -rw-r--r-- | lib/Target/SparcV8/SparcV8AsmPrinter.cpp | 17 | ||||
| -rw-r--r-- | lib/Target/SparcV8/SparcV8InstrInfo.td | 17 |
4 files changed, 20 insertions, 48 deletions
diff --git a/lib/Target/Sparc/SparcAsmPrinter.cpp b/lib/Target/Sparc/SparcAsmPrinter.cpp index 8867275d61..cd66c19384 100644 --- a/lib/Target/Sparc/SparcAsmPrinter.cpp +++ b/lib/Target/Sparc/SparcAsmPrinter.cpp @@ -422,19 +422,6 @@ void SparcV8AsmPrinter::printOperand(const MachineInstr *MI, int opNum) { if (CloseParen) O << ")"; } -static bool isPseudoInstruction (const MachineInstr *MI) { - switch (MI->getOpcode ()) { - case V8::PHI: - case V8::ADJCALLSTACKUP: - case V8::ADJCALLSTACKDOWN: - case V8::IMPLICIT_USE: - case V8::IMPLICIT_DEF: - return true; - default: - return false; - } -} - /// printBaseOffsetPair - Print two consecutive operands of MI, starting at #i, /// which form a base + offset pair (which may have brackets around it, if /// brackets is true, or may be in the form base - constant, if offset is a @@ -467,10 +454,6 @@ void SparcV8AsmPrinter::printMachineInstruction(const MachineInstr *MI) { const TargetInstrInfo &TII = *TM.getInstrInfo(); const TargetInstrDescriptor &Desc = TII.get(Opcode); - // If it's a pseudo-instruction, comment it out. - if (isPseudoInstruction (MI)) - O << "! "; - O << Desc.Name << " "; // print non-immediate, non-register-def operands diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td index 6bf5f27d18..1f8349e11b 100644 --- a/lib/Target/Sparc/SparcInstrInfo.td +++ b/lib/Target/Sparc/SparcInstrInfo.td @@ -35,16 +35,19 @@ include "SparcV8InstrFormats.td" //===----------------------------------------------------------------------===// // Pseudo instructions. -class PseudoInstV8<string nm, dag ops> : InstV8 { - let Name = nm; +class PseudoInstV8<string asmstr, dag ops> : InstV8 { + let AsmString = asmstr; dag OperandList = ops; } def PHI : PseudoInstV8<"PHI", (ops variable_ops)>; -def ADJCALLSTACKDOWN : PseudoInstV8<"ADJCALLSTACKDOWN", (ops variable_ops)>; -def ADJCALLSTACKUP : PseudoInstV8<"ADJCALLSTACKUP", (ops variable_ops)>; -def IMPLICIT_USE : PseudoInstV8<"IMPLICIT_USE", (ops variable_ops)>; -def IMPLICIT_DEF : PseudoInstV8<"IMPLICIT_DEF", (ops variable_ops)>; -def FpMOVD : PseudoInstV8<"FpMOVD", (ops)>; // pseudo 64-bit double move +def ADJCALLSTACKDOWN : PseudoInstV8<"!ADJCALLSTACKDOWN $amt", + (ops i32imm:$amt)>; +def ADJCALLSTACKUP : PseudoInstV8<"!ADJCALLSTACKUP $amt", + (ops i32imm:$amt)>; +//def IMPLICIT_USE : PseudoInstV8<"!IMPLICIT_USE",(ops variable_ops)>; +def IMPLICIT_DEF : PseudoInstV8<"!IMPLICIT_DEF $dst", + (ops IntRegs:$dst)>; +def FpMOVD : PseudoInstV8<"!FpMOVD", (ops)>; // pseudo 64-bit double move // Section A.3 - Synthetic Instructions, p. 85 // special cases of JMPL: diff --git a/lib/Target/SparcV8/SparcV8AsmPrinter.cpp b/lib/Target/SparcV8/SparcV8AsmPrinter.cpp index 8867275d61..cd66c19384 100644 --- a/lib/Target/SparcV8/SparcV8AsmPrinter.cpp +++ b/lib/Target/SparcV8/SparcV8AsmPrinter.cpp @@ -422,19 +422,6 @@ void SparcV8AsmPrinter::printOperand(const MachineInstr *MI, int opNum) { if (CloseParen) O << ")"; } -static bool isPseudoInstruction (const MachineInstr *MI) { - switch (MI->getOpcode ()) { - case V8::PHI: - case V8::ADJCALLSTACKUP: - case V8::ADJCALLSTACKDOWN: - case V8::IMPLICIT_USE: - case V8::IMPLICIT_DEF: - return true; - default: - return false; - } -} - /// printBaseOffsetPair - Print two consecutive operands of MI, starting at #i, /// which form a base + offset pair (which may have brackets around it, if /// brackets is true, or may be in the form base - constant, if offset is a @@ -467,10 +454,6 @@ void SparcV8AsmPrinter::printMachineInstruction(const MachineInstr *MI) { const TargetInstrInfo &TII = *TM.getInstrInfo(); const TargetInstrDescriptor &Desc = TII.get(Opcode); - // If it's a pseudo-instruction, comment it out. - if (isPseudoInstruction (MI)) - O << "! "; - O << Desc.Name << " "; // print non-immediate, non-register-def operands diff --git a/lib/Target/SparcV8/SparcV8InstrInfo.td b/lib/Target/SparcV8/SparcV8InstrInfo.td index 6bf5f27d18..1f8349e11b 100644 --- a/lib/Target/SparcV8/SparcV8InstrInfo.td +++ b/lib/Target/SparcV8/SparcV8InstrInfo.td @@ -35,16 +35,19 @@ include "SparcV8InstrFormats.td" //===----------------------------------------------------------------------===// // Pseudo instructions. -class PseudoInstV8<string nm, dag ops> : InstV8 { - let Name = nm; +class PseudoInstV8<string asmstr, dag ops> : InstV8 { + let AsmString = asmstr; dag OperandList = ops; } def PHI : PseudoInstV8<"PHI", (ops variable_ops)>; -def ADJCALLSTACKDOWN : PseudoInstV8<"ADJCALLSTACKDOWN", (ops variable_ops)>; -def ADJCALLSTACKUP : PseudoInstV8<"ADJCALLSTACKUP", (ops variable_ops)>; -def IMPLICIT_USE : PseudoInstV8<"IMPLICIT_USE", (ops variable_ops)>; -def IMPLICIT_DEF : PseudoInstV8<"IMPLICIT_DEF", (ops variable_ops)>; -def FpMOVD : PseudoInstV8<"FpMOVD", (ops)>; // pseudo 64-bit double move +def ADJCALLSTACKDOWN : PseudoInstV8<"!ADJCALLSTACKDOWN $amt", + (ops i32imm:$amt)>; +def ADJCALLSTACKUP : PseudoInstV8<"!ADJCALLSTACKUP $amt", + (ops i32imm:$amt)>; +//def IMPLICIT_USE : PseudoInstV8<"!IMPLICIT_USE",(ops variable_ops)>; +def IMPLICIT_DEF : PseudoInstV8<"!IMPLICIT_DEF $dst", + (ops IntRegs:$dst)>; +def FpMOVD : PseudoInstV8<"!FpMOVD", (ops)>; // pseudo 64-bit double move // Section A.3 - Synthetic Instructions, p. 85 // special cases of JMPL: |