diff options
| -rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 2 | ||||
| -rw-r--r-- | test/MC/ARM/basic-thumb2-instructions.s | 13 |
2 files changed, 14 insertions, 1 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index fdefe43bb8..57c76d81cf 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -2674,7 +2674,7 @@ parseITCondCode(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { const AsmToken &Tok = Parser.getTok(); if (!Tok.is(AsmToken::Identifier)) return MatchOperand_NoMatch; - unsigned CC = StringSwitch<unsigned>(Tok.getString()) + unsigned CC = StringSwitch<unsigned>(Tok.getString().lower()) .Case("eq", ARMCC::EQ) .Case("ne", ARMCC::NE) .Case("hs", ARMCC::HS) diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s index 68ef2897c1..4aed9e2bea 100644 --- a/test/MC/ARM/basic-thumb2-instructions.s +++ b/test/MC/ARM/basic-thumb2-instructions.s @@ -509,6 +509,19 @@ _func: @ CHECK: subne r5, r6, r7 @ encoding: [0xf5,0x1b] @ CHECK: addeq r1, r2, #4 @ encoding: [0x11,0x1d] +@ Should also work for UPPER CASE condition codes. + + ITEET EQ + ADDEQ R0, R1, R2 + NOPNE + SUBNE R5, R6, R7 + ADDEQ R1, R2, #4 + +@ CHECK: iteet eq @ encoding: [0x0d,0xbf] +@ CHECK: addeq r0, r1, r2 @ encoding: [0x88,0x18] +@ CHECK: nopne @ encoding: [0x00,0xbf] +@ CHECK: subne r5, r6, r7 @ encoding: [0xf5,0x1b] +@ CHECK: addeq r1, r2, #4 @ encoding: [0x11,0x1d] @------------------------------------------------------------------------------ @ LDC{L}/LDC2{L} |