diff options
-rw-r--r-- | lib/Target/ARM/ARMTargetTransformInfo.cpp | 8 | ||||
-rw-r--r-- | test/Analysis/CostModel/ARM/cast.ll | 14 |
2 files changed, 22 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMTargetTransformInfo.cpp b/lib/Target/ARM/ARMTargetTransformInfo.cpp index 01c04b48cf..eef282e709 100644 --- a/lib/Target/ARM/ARMTargetTransformInfo.cpp +++ b/lib/Target/ARM/ARMTargetTransformInfo.cpp @@ -194,6 +194,14 @@ unsigned ARMTTI::getCastInstrCost(unsigned Opcode, Type *Dst, { ISD::TRUNCATE, MVT::v4i32, MVT::v4i64, 0 }, { ISD::TRUNCATE, MVT::v4i16, MVT::v4i32, 1 }, + // Operations that we legalize using load/stores to the stack. + { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i8, 16*2 + 4*4 }, + { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i8, 16*2 + 4*3 }, + { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i8, 8*2 + 2*4 }, + { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i8, 8*2 + 2*3 }, + { ISD::TRUNCATE, MVT::v16i8, MVT::v16i32, 4*1 + 16*2 + 2*1 }, + { ISD::TRUNCATE, MVT::v8i8, MVT::v8i32, 2*1 + 8*2 + 1 }, + // Vector float <-> i32 conversions. { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 }, { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 }, diff --git a/test/Analysis/CostModel/ARM/cast.ll b/test/Analysis/CostModel/ARM/cast.ll index 464b6ece0e..779c4384e8 100644 --- a/test/Analysis/CostModel/ARM/cast.ll +++ b/test/Analysis/CostModel/ARM/cast.ll @@ -152,6 +152,20 @@ define i32 @casts() { ; CHECK: cost of 10 {{.*}} uitofp %r69 = uitofp i64 undef to double + ; Vector cast cost of instructions lowering the cast to the stack. + ; CHECK: cost of 24 {{.*}} sext + %r70 = sext <8 x i8> undef to <8 x i32> + ; CHECK: cost of 48 {{.*}} sext + %r71 = sext <16 x i8> undef to <16 x i32> + ; CHECK: cost of 22 {{.*}} zext + %r72 = zext <8 x i8> undef to <8 x i32> + ; CHECK: cost of 44 {{.*}} zext + %r73 = zext <16 x i8> undef to <16 x i32> + ; CHECK: cost of 19 {{.*}} trunc + %r74 = trunc <8 x i32> undef to <8 x i8> + ; CHECK: cost of 38 {{.*}} trunc + %r75 = trunc <16 x i32> undef to <16 x i8> + ;CHECK: cost of 0 {{.*}} ret ret i32 undef } |