diff options
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 17 | ||||
| -rw-r--r-- | test/CodeGen/X86/dagcombine-buildvector.ll | 13 |
2 files changed, 24 insertions, 6 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 3e517cfe3a..db4b392723 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -5164,30 +5164,35 @@ SDValue DAGCombiner::visitBUILD_VECTOR(SDNode *N) { } // If everything is good, we can make a shuffle operation. + MVT IndexVT = MVT::i32; if (VecIn1.getNode()) { SmallVector<SDValue, 8> BuildVecIndices; for (unsigned i = 0; i != NumInScalars; ++i) { if (N->getOperand(i).getOpcode() == ISD::UNDEF) { - BuildVecIndices.push_back(DAG.getUNDEF(TLI.getPointerTy())); + BuildVecIndices.push_back(DAG.getUNDEF(IndexVT)); continue; } SDValue Extract = N->getOperand(i); // If extracting from the first vector, just use the index directly. + SDValue ExtVal = Extract.getOperand(1); if (Extract.getOperand(0) == VecIn1) { - BuildVecIndices.push_back(Extract.getOperand(1)); + if (ExtVal.getValueType() == IndexVT) + BuildVecIndices.push_back(ExtVal); + else { + unsigned Idx = cast<ConstantSDNode>(ExtVal)->getZExtValue(); + BuildVecIndices.push_back(DAG.getConstant(Idx, IndexVT)); + } continue; } // Otherwise, use InIdx + VecSize - unsigned Idx = - cast<ConstantSDNode>(Extract.getOperand(1))->getZExtValue(); - BuildVecIndices.push_back(DAG.getIntPtrConstant(Idx+NumInScalars)); + unsigned Idx = cast<ConstantSDNode>(ExtVal)->getZExtValue(); + BuildVecIndices.push_back(DAG.getConstant(Idx+NumInScalars, IndexVT)); } // Add count and size info. - MVT IndexVT = MVT::getIntegerVT(EltType.getSizeInBits()); MVT BuildVecVT = MVT::getVectorVT(IndexVT, NumElts); if (!TLI.isTypeLegal(BuildVecVT) && LegalTypes) return SDValue(); diff --git a/test/CodeGen/X86/dagcombine-buildvector.ll b/test/CodeGen/X86/dagcombine-buildvector.ll new file mode 100644 index 0000000000..2ca4177919 --- /dev/null +++ b/test/CodeGen/X86/dagcombine-buildvector.ll @@ -0,0 +1,13 @@ +; RUN: llvm-as < %s | llc -march=x86 -o %t -f +; RUN: grep unpcklpd %t | count 1 +; RUN: grep movapd %t | count 1 + +; Shows a dag combine bug that will generate an illegal build vector +; with v2i64 build_vector i32, i32. + +define void @test(<2 x double>* %dst, <4 x double> %src) { +entry: + %tmp7.i = shufflevector <4 x double> %src, <4 x double> undef, <2 x i32> < i32 0, i32 2 > + store <2 x double> %tmp7.i, <2 x double>* %dst + ret void +}
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