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-rw-r--r--lib/Target/X86/AsmParser/X86AsmParser.cpp6
-rw-r--r--test/MC/AsmParser/X86/x86_64-new-encoder.s6
2 files changed, 10 insertions, 2 deletions
diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp
index 9a43913b7c..7e9dacf776 100644
--- a/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -850,7 +850,8 @@ ParseInstruction(StringRef Name, SMLoc NameLoc,
// The assembler accepts "xchgX <reg>, <mem>" and "xchgX <mem>, <reg>" as
// synonyms. Our tables only have the "<reg>, <mem>" form, so if we see the
// other operand order, swap them.
- if (Name == "xchgb" || Name == "xchgw" || Name == "xchgl" || Name == "xchgq")
+ if (Name == "xchgb" || Name == "xchgw" || Name == "xchgl" || Name == "xchgq"||
+ Name == "xchg")
if (Operands.size() == 3 &&
static_cast<X86Operand*>(Operands[1])->isMem() &&
static_cast<X86Operand*>(Operands[2])->isReg()) {
@@ -860,7 +861,8 @@ ParseInstruction(StringRef Name, SMLoc NameLoc,
// The assembler accepts "testX <reg>, <mem>" and "testX <mem>, <reg>" as
// synonyms. Our tables only have the "<mem>, <reg>" form, so if we see the
// other operand order, swap them.
- if (Name == "testb" || Name == "testw" || Name == "testl" || Name == "testq")
+ if (Name == "testb" || Name == "testw" || Name == "testl" || Name == "testq"||
+ Name == "test")
if (Operands.size() == 3 &&
static_cast<X86Operand*>(Operands[1])->isReg() &&
static_cast<X86Operand*>(Operands[2])->isMem()) {
diff --git a/test/MC/AsmParser/X86/x86_64-new-encoder.s b/test/MC/AsmParser/X86/x86_64-new-encoder.s
index e23c22478c..86619521fd 100644
--- a/test/MC/AsmParser/X86/x86_64-new-encoder.s
+++ b/test/MC/AsmParser/X86/x86_64-new-encoder.s
@@ -174,6 +174,12 @@ xchgl 368(%rax),%ecx
xchgl %ecx, 368(%rax)
// CHECK: xchgl %ecx, 368(%rax)
+// rdar://8407548
+xchg 0xdeadbeef(%rbx,%rcx,8),%bl
+// CHECK: xchgb %bl, 3735928559(%rbx,%rcx,8)
+
+
+
// PR7254
lock incl 1(%rsp)
// CHECK: lock