diff options
| -rw-r--r-- | lib/Target/ARM/ARMTargetTransformInfo.cpp | 15 | ||||
| -rw-r--r-- | test/Analysis/CostModel/ARM/select.ll | 54 |
2 files changed, 69 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMTargetTransformInfo.cpp b/lib/Target/ARM/ARMTargetTransformInfo.cpp index bf83d51445..1f91e0ee36 100644 --- a/lib/Target/ARM/ARMTargetTransformInfo.cpp +++ b/lib/Target/ARM/ARMTargetTransformInfo.cpp @@ -117,6 +117,8 @@ public: unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) const; + unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy) const; + unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) const; /// @} }; @@ -311,3 +313,16 @@ unsigned ARMTTI::getVectorInstrCost(unsigned Opcode, Type *ValTy, return TargetTransformInfo::getVectorInstrCost(Opcode, ValTy, Index); } + +unsigned ARMTTI::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, + Type *CondTy) const { + + int ISD = TLI->InstructionOpcodeToISD(Opcode); + // On NEON a a vector select gets lowered to vbsl. + if (ST->hasNEON() && ValTy->isVectorTy() && ISD == ISD::SELECT) { + std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(ValTy); + return LT.first; + } + + return TargetTransformInfo::getCmpSelInstrCost(Opcode, ValTy, CondTy); +} diff --git a/test/Analysis/CostModel/ARM/select.ll b/test/Analysis/CostModel/ARM/select.ll new file mode 100644 index 0000000000..96afccfc8c --- /dev/null +++ b/test/Analysis/CostModel/ARM/select.ll @@ -0,0 +1,54 @@ +; RUN: opt < %s -cost-model -analyze -mtriple=thumbv7-apple-ios6.0.0 -mcpu=swift | FileCheck %s +target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32" +target triple = "thumbv7-apple-ios6.0.0" + +; CHECK: casts +define void @casts() { + ; Scalar values + ; CHECK: cost of 1 {{.*}} select + %v1 = select i1 undef, i8 undef, i8 undef + ; CHECK: cost of 1 {{.*}} select + %v2 = select i1 undef, i16 undef, i16 undef + ; CHECK: cost of 1 {{.*}} select + %v3 = select i1 undef, i32 undef, i32 undef + ; CHECK: cost of 2 {{.*}} select + %v4 = select i1 undef, i64 undef, i64 undef + ; CHECK: cost of 1 {{.*}} select + %v5 = select i1 undef, float undef, float undef + ; CHECK: cost of 1 {{.*}} select + %v6 = select i1 undef, double undef, double undef + + ; Vector values + ; CHECK: cost of 1 {{.*}} select + %v7 = select <2 x i1> undef, <2 x i8> undef, <2 x i8> undef + ; CHECK: cost of 1 {{.*}} select + %v8 = select <4 x i1> undef, <4 x i8> undef, <4 x i8> undef + ; CHECK: cost of 1 {{.*}} select + %v9 = select <8 x i1> undef, <8 x i8> undef, <8 x i8> undef + ; CHECK: cost of 1 {{.*}} select + %v10 = select <16 x i1> undef, <16 x i8> undef, <16 x i8> undef + + ; CHECK: cost of 1 {{.*}} select + %v11 = select <2 x i1> undef, <2 x i16> undef, <2 x i16> undef + ; CHECK: cost of 1 {{.*}} select + %v12 = select <4 x i1> undef, <4 x i16> undef, <4 x i16> undef + ; CHECK: cost of 1 {{.*}} select + %v13 = select <8 x i1> undef, <8 x i16> undef, <8 x i16> undef + + ; CHECK: cost of 1 {{.*}} select + %v14 = select <2 x i1> undef, <2 x i32> undef, <2 x i32> undef + ; CHECK: cost of 1 {{.*}} select + %v15 = select <4 x i1> undef, <4 x i32> undef, <4 x i32> undef + ; CHECK: cost of 1 {{.*}} select + %v16 = select <2 x i1> undef, <2 x i64> undef, <2 x i64> undef + + ; CHECK: cost of 1 {{.*}} select + %v17 = select <2 x i1> undef, <2 x float> undef, <2 x float> undef + ; CHECK: cost of 1 {{.*}} select + %v18 = select <4 x i1> undef, <4 x float> undef, <4 x float> undef + + ; CHECK: cost of 1 {{.*}} select + %v19 = select <2 x i1> undef, <2 x double> undef, <2 x double> undef + + ret void +} |