diff options
| -rw-r--r-- | lib/Target/CellSPU/README.txt | 25 |
1 files changed, 18 insertions, 7 deletions
diff --git a/lib/Target/CellSPU/README.txt b/lib/Target/CellSPU/README.txt index 636a41d5fc..083867ff78 100644 --- a/lib/Target/CellSPU/README.txt +++ b/lib/Target/CellSPU/README.txt @@ -34,16 +34,27 @@ to add 'spu' to configure's --enable-targets option, e.g.: --------------------------------------------------------------------------- -The unofficially official status page (because it's not easy to get an -officially blessed external web page from either IBM Austin or Aerospace): +TODO: +* Create a machine pass for performing dual-pipeline scheduling specifically + for CellSPU, handle inserting branch prediction instructions. - http://sites.google.com/site/llvmcellspu/ +* i32 instructions: -TODO: -* Finish branch instructions, branch prediction + * i32 division (work-in-progress) + +* i64 support (see i64operations.c test harness): + + * shifts and comparison operators: done + * sign and zero extension: done + * addition: done + * subtraction: needed + * multiplication: work-in-progress + +* i128 support: - These instructions were started, but only insofar as to get llvm-gcc-4.2's - crtbegin.ll working (which doesn't.) + * zero extension: done + * sign extension: needed + * arithmetic operators (add, sub, mul, div): needed * Double floating point support |