diff options
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 2 | ||||
| -rw-r--r-- | test/CodeGen/ARM/2011-10-26-memset-inline.ll | 18 |
2 files changed, 20 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 472bf4c42f..31e522d4d7 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -752,6 +752,8 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM) //// temporary - rewrite interface to use type maxStoresPerMemcpy = maxStoresPerMemcpyOptSize = 1; + maxStoresPerMemset = 16; + maxStoresPerMemsetOptSize = Subtarget->isTargetDarwin() ? 8 : 4; // On ARM arguments smaller than 4 bytes are extended, so all arguments // are at least 4 bytes aligned. diff --git a/test/CodeGen/ARM/2011-10-26-memset-inline.ll b/test/CodeGen/ARM/2011-10-26-memset-inline.ll new file mode 100644 index 0000000000..a236ffe475 --- /dev/null +++ b/test/CodeGen/ARM/2011-10-26-memset-inline.ll @@ -0,0 +1,18 @@ +; Make sure short memsets on ARM lower to stores, even when optimizing for size. +; RUN: llc -march=arm < %s | FileCheck %s + +target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32" +target triple = "thumbv7-apple-ios5.0.0" + +; CHECK: strb +; CHECK-NEXT: strb +; CHECK-NEXT: strb +; CHECK-NEXT: strb +; CHECK-NEXT: strb +define void @foo(i8* nocapture %c) nounwind optsize { +entry: + call void @llvm.memset.p0i8.i64(i8* %c, i8 -1, i64 5, i32 1, i1 false) + ret void +} + +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind |