diff options
| -rw-r--r-- | lib/Target/X86/X86CallingConv.td | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/sse-varargs.ll | 9 |
2 files changed, 11 insertions, 2 deletions
diff --git a/lib/Target/X86/X86CallingConv.td b/lib/Target/X86/X86CallingConv.td index 1bfd021b36..4d674f73ce 100644 --- a/lib/Target/X86/X86CallingConv.td +++ b/lib/Target/X86/X86CallingConv.td @@ -190,8 +190,8 @@ def CC_X86_32_Common : CallingConv<[ CCIfType<[f80], CCAssignToStack<0, 4>>, // The first 4 vector arguments are passed in XMM registers. - CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], - CCAssignToReg<[XMM0, XMM1, XMM2, XMM3]>>, + CCIfNotVarArg<CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], + CCAssignToReg<[XMM0, XMM1, XMM2, XMM3]>>>, // Other vectors get 16-byte stack slots that are 16-byte aligned. CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToStack<16, 16>>, diff --git a/test/CodeGen/X86/sse-varargs.ll b/test/CodeGen/X86/sse-varargs.ll new file mode 100644 index 0000000000..806126da2f --- /dev/null +++ b/test/CodeGen/X86/sse-varargs.ll @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep xmm | grep esp + +define i32 @t() nounwind { +entry: + tail call void (i32, ...)* @foo( i32 1, <4 x i32> < i32 10, i32 11, i32 12, i32 13 > ) nounwind + ret i32 0 +} + +declare void @foo(i32, ...) |