diff options
| -rw-r--r-- | lib/Target/Mips/MipsInstrFPU.td | 1 | ||||
| -rw-r--r-- | test/CodeGen/Mips/mips64ext.ll | 7 |
2 files changed, 8 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsInstrFPU.td b/lib/Target/Mips/MipsInstrFPU.td index 7638f5486a..28cde9159c 100644 --- a/lib/Target/Mips/MipsInstrFPU.td +++ b/lib/Target/Mips/MipsInstrFPU.td @@ -337,6 +337,7 @@ let Predicates = [IsFP64bit] in { (CVT_D64_L (DMTC1 CPU64Regs:$src))>; def : Pat<(i32 (fp_to_sint FGR64:$src)), (MFC1 (TRUNC_W_D64 FGR64:$src))>; + def : Pat<(i64 (fp_to_sint FGR32:$src)), (DMFC1 (TRUNC_L_S FGR32:$src))>; def : Pat<(i64 (fp_to_sint FGR64:$src)), (DMFC1 (TRUNC_L_D64 FGR64:$src))>; def : Pat<(f32 (fround FGR64:$src)), (CVT_S_D64 FGR64:$src)>; diff --git a/test/CodeGen/Mips/mips64ext.ll b/test/CodeGen/Mips/mips64ext.ll index 7981ec7a47..02a35f8e6e 100644 --- a/test/CodeGen/Mips/mips64ext.ll +++ b/test/CodeGen/Mips/mips64ext.ll @@ -17,3 +17,10 @@ entry: ret i64 %conv } +define i64 @i64_float(float %f) nounwind readnone { +entry: +; CHECK: trunc.l.s + %conv = fptosi float %f to i64 + ret i64 %conv +} + |