diff options
| -rw-r--r-- | lib/Transforms/Scalar/InstructionCombining.cpp | 4 | ||||
| -rw-r--r-- | utils/TableGen/Record.cpp | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp index 52c312973b..7b01531fb2 100644 --- a/lib/Transforms/Scalar/InstructionCombining.cpp +++ b/lib/Transforms/Scalar/InstructionCombining.cpp @@ -757,9 +757,9 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, uint64_t DemandedMask, // If all of the demanded bits are known zero on one side, return the other. // These bits cannot contribute to the result of the 'or'. - if ((DemandedMask & ~KnownOne2 & KnownZero) == DemandedMask & ~KnownOne2) + if ((DemandedMask & ~KnownOne2 & KnownZero) == (DemandedMask & ~KnownOne2)) return UpdateValueUsesWith(I, I->getOperand(0)); - if ((DemandedMask & ~KnownOne & KnownZero2) == DemandedMask & ~KnownOne) + if ((DemandedMask & ~KnownOne & KnownZero2) == (DemandedMask & ~KnownOne)) return UpdateValueUsesWith(I, I->getOperand(1)); // If all of the potentially set bits on one side are known to be set on diff --git a/utils/TableGen/Record.cpp b/utils/TableGen/Record.cpp index 51014813b2..2798afba6c 100644 --- a/utils/TableGen/Record.cpp +++ b/utils/TableGen/Record.cpp @@ -69,13 +69,13 @@ Init *BitsRecTy::convertValue(IntInit *II) { if (Value & ~((1LL << Size)-1)) return 0; } else { - if ((Value >> Size) != -1 || ((Value & (1 << (Size-1))) == 0)) + if ((Value >> Size) != -1 || ((Value & (1LL << (Size-1))) == 0)) return 0; } BitsInit *Ret = new BitsInit(Size); for (unsigned i = 0; i != Size; ++i) - Ret->setBit(i, new BitInit(Value & (1 << i))); + Ret->setBit(i, new BitInit(Value & (1LL << i))); return Ret; } |