diff options
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 6 | ||||
| -rw-r--r-- | test/CodeGen/ARM/2012-09-18-ARMv4ISelBug.ll | 11 | ||||
| -rw-r--r-- | test/CodeGen/ARM/sub.ll | 2 |
3 files changed, 16 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index e23989e25c..20d7c1b1d2 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -3092,9 +3092,11 @@ def : ARMPat<(ARMaddc GPR:$src, so_imm_neg:$imm), (SUBSri GPR:$src, so_imm_neg:$imm)>; def : ARMPat<(add GPR:$src, imm0_65535_neg:$imm), - (SUBrr GPR:$src, (MOVi16 (imm_neg_XFORM imm:$imm)))>; + (SUBrr GPR:$src, (MOVi16 (imm_neg_XFORM imm:$imm)))>, + Requires<[IsARM, HasV6T2]>; def : ARMPat<(ARMaddc GPR:$src, imm0_65535_neg:$imm), - (SUBSrr GPR:$src, (MOVi16 (imm_neg_XFORM imm:$imm)))>; + (SUBSrr GPR:$src, (MOVi16 (imm_neg_XFORM imm:$imm)))>, + Requires<[IsARM, HasV6T2]>; // The with-carry-in form matches bitwise not instead of the negation. // Effectively, the inverse interpretation of the carry flag already accounts diff --git a/test/CodeGen/ARM/2012-09-18-ARMv4ISelBug.ll b/test/CodeGen/ARM/2012-09-18-ARMv4ISelBug.ll new file mode 100644 index 0000000000..e761ffe72c --- /dev/null +++ b/test/CodeGen/ARM/2012-09-18-ARMv4ISelBug.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s -march=arm -mcpu=arm7tdmi | FileCheck %s + +; movw is only legal for V6T2 and later. +; rdar://12300648 + +define i32 @t(i32 %x) { +; CHECK: t: +; CHECK-NOT: movw + %tmp = add i32 %x, -65535 + ret i32 %tmp +} diff --git a/test/CodeGen/ARM/sub.ll b/test/CodeGen/ARM/sub.ll index 474043afc1..7f82ca7012 100644 --- a/test/CodeGen/ARM/sub.ll +++ b/test/CodeGen/ARM/sub.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=arm < %s | FileCheck %s +; RUN: llc -march=arm -mcpu=cortex-a8 < %s | FileCheck %s ; 171 = 0x000000ab define i64 @f1(i64 %a) { |