diff options
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/divide-by-constant.ll | 6 |
2 files changed, 4 insertions, 4 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index c58dede823..cd26e647b4 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -3178,7 +3178,7 @@ SDValue DAGCombiner::visitSRL(SDNode *N) { uint64_t c1 = cast<ConstantSDNode>(N0.getOperand(0)->getOperand(1))->getZExtValue(); uint64_t c2 = N1C->getZExtValue(); - EVT InnerShiftVT = N0.getOperand(0)->getOperand(1).getValueType(); + EVT InnerShiftVT = N0.getOperand(0).getValueType(); uint64_t InnerShiftSize = InnerShiftVT.getScalarType().getSizeInBits(); // This is only valid if the OpSizeInBits + c1 = size of inner shift. if (c1 + OpSizeInBits == InnerShiftSize) { diff --git a/test/CodeGen/X86/divide-by-constant.ll b/test/CodeGen/X86/divide-by-constant.ll index ab3bd94149..545662fd0f 100644 --- a/test/CodeGen/X86/divide-by-constant.ll +++ b/test/CodeGen/X86/divide-by-constant.ll @@ -29,9 +29,9 @@ entry: ret i8 %div ; CHECK: test3: -; CHECK: imull $171, %eax, %eax -; CHECK-NEXT: shrb %ah -; CHECK-NEXT: movzbl %ah, %eax +; CHECK: movzbl 8(%esp), %eax +; CHECK-NEXT: imull $171, %eax, %eax +; CHECK-NEXT: shrl $9, %eax ; CHECK-NEXT: ret } |