diff options
101 files changed, 10 insertions, 5820 deletions
diff --git a/CMakeLists.txt b/CMakeLists.txt index 66ddaf68be..f3ff1979c9 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -66,7 +66,6 @@ endif() set(LLVM_ALL_TARGETS Alpha ARM - Blackfin CBackend CellSPU CppBackend diff --git a/autoconf/configure.ac b/autoconf/configure.ac index 32a1e8de7b..89f846749c 100644 --- a/autoconf/configure.ac +++ b/autoconf/configure.ac @@ -357,7 +357,6 @@ AC_CACHE_CHECK([target architecture],[llvm_cv_target_arch], mips-*) llvm_cv_target_arch="Mips" ;; xcore-*) llvm_cv_target_arch="XCore" ;; msp430-*) llvm_cv_target_arch="MSP430" ;; - bfin-*) llvm_cv_target_arch="Blackfin" ;; mblaze-*) llvm_cv_target_arch="MBlaze" ;; ptx-*) llvm_cv_target_arch="PTX" ;; *) llvm_cv_target_arch="Unknown" ;; @@ -493,7 +492,6 @@ else Mips) AC_SUBST(TARGET_HAS_JIT,1) ;; XCore) AC_SUBST(TARGET_HAS_JIT,0) ;; MSP430) AC_SUBST(TARGET_HAS_JIT,0) ;; - Blackfin) AC_SUBST(TARGET_HAS_JIT,0) ;; MBlaze) AC_SUBST(TARGET_HAS_JIT,0) ;; PTX) AC_SUBST(TARGET_HAS_JIT,0) ;; *) AC_SUBST(TARGET_HAS_JIT,0) ;; @@ -606,13 +604,13 @@ TARGETS_TO_BUILD="" AC_ARG_ENABLE([targets],AS_HELP_STRING([--enable-targets], [Build specific host targets: all or target1,target2,... Valid targets are: host, x86, x86_64, sparc, powerpc, alpha, arm, mips, spu, - xcore, msp430, blackfin, ptx, cbe, and cpp (default=all)]),, + xcore, msp430, ptx, cbe, and cpp (default=all)]),, enableval=all) if test "$enableval" = host-only ; then enableval=host fi case "$enableval" in - all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU XCore MSP430 Blackfin CBackend CppBackend MBlaze PTX" ;; + all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU XCore MSP430 CBackend CppBackend MBlaze PTX" ;; *)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do case "$a_target" in x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; @@ -625,7 +623,6 @@ case "$enableval" in spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;; xcore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;; msp430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;; - blackfin) TARGETS_TO_BUILD="Blackfin $TARGETS_TO_BUILD" ;; cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;; cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;; mblaze) TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;; @@ -642,7 +639,6 @@ case "$enableval" in CellSPU|SPU) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;; XCore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;; MSP430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;; - Blackfin) TARGETS_TO_BUILD="Blackfin $TARGETS_TO_BUILD" ;; PTX) TARGETS_TO_BUILD="PTX $TARGETS_TO_BUILD" ;; *) AC_MSG_ERROR([Can not set target to build]) ;; esac ;; @@ -1416,7 +1416,7 @@ Optional Features: --enable-targets Build specific host targets: all or target1,target2,... Valid targets are: host, x86, x86_64, sparc, powerpc, alpha, arm, mips, spu, - xcore, msp430, blackfin, ptx, cbe, and cpp + xcore, msp430, ptx, cbe, and cpp (default=all) --enable-cbe-printf-a Enable C Backend output with hex floating point via %a (default is YES) @@ -3880,7 +3880,6 @@ else mips-*) llvm_cv_target_arch="Mips" ;; xcore-*) llvm_cv_target_arch="XCore" ;; msp430-*) llvm_cv_target_arch="MSP430" ;; - bfin-*) llvm_cv_target_arch="Blackfin" ;; mblaze-*) llvm_cv_target_arch="MBlaze" ;; ptx-*) llvm_cv_target_arch="PTX" ;; *) llvm_cv_target_arch="Unknown" ;; @@ -5287,7 +5286,6 @@ case "$enableval" in spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;; xcore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;; msp430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;; - blackfin) TARGETS_TO_BUILD="Blackfin $TARGETS_TO_BUILD" ;; cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;; cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;; mblaze) TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;; diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html index c238fd3afc..aa6beb311b 100644 --- a/docs/CodeGenerator.html +++ b/docs/CodeGenerator.html @@ -2209,7 +2209,6 @@ is the key:</p> <th>Feature</th> <th>ARM</th> <th>Alpha</th> - <th>Blackfin</th> <th>CellSPU</th> <th>MBlaze</th> <th>MSP430</th> @@ -2225,7 +2224,6 @@ is the key:</p> <td><a href="#feat_reliable">is generally reliable</a></td> <td class="yes"></td> <!-- ARM --> <td class="unknown"></td> <!-- Alpha --> - <td class="no"></td> <!-- Blackfin --> <td class="no"></td> <!-- CellSPU --> <td class="no"></td> <!-- MBlaze --> <td class="unknown"></td> <!-- MSP430 --> @@ -2241,7 +2239,6 @@ is the key:</p> <td><a href="#feat_asmparser">assembly parser</a></td> <td class="no"></td> <!-- ARM --> <td class="no"></td> <!-- Alpha --> - <td class="no"></td> <!-- Blackfin --> <td class="no"></td> <!-- CellSPU --> <td class="yes"></td> <!-- MBlaze --> <td class="no"></td> <!-- MSP430 --> @@ -2257,7 +2254,6 @@ is the key:</p> <td><a href="#feat_disassembler">disassembler</a></td> <td class="yes"></td> <!-- ARM --> <td class="no"></td> <!-- Alpha --> - <td class="no"></td> <!-- Blackfin --> <td class="no"></td> <!-- CellSPU --> <td class="yes"></td> <!-- MBlaze --> <td class="no"></td> <!-- MSP430 --> @@ -2273,7 +2269,6 @@ is the key:</p> <td><a href="#feat_inlineasm">inline asm</a></td> <td class="yes"></td> <!-- ARM --> <td class="unknown"></td> <!-- Alpha --> - <td class="yes"></td> <!-- Blackfin --> <td class="no"></td> <!-- CellSPU --> <td class="yes"></td> <!-- MBlaze --> <td class="unknown"></td> <!-- MSP430 --> @@ -2289,7 +2284,6 @@ is the key:</p> <td><a href="#feat_jit">jit</a></td> <td class="partial"><a href="#feat_jit_arm">*</a></td> <!-- ARM --> <td class="no"></td> <!-- Alpha --> - <td class="no"></td> <!-- Blackfin --> <td class="no"></td> <!-- CellSPU --> <td class="no"></td> <!-- MBlaze --> <td class="unknown"></td> <!-- MSP430 --> @@ -2305,7 +2299,6 @@ is the key:</p> <td><a href="#feat_objectwrite">.o file writing</a></td> <td class="no"></td> <!-- ARM --> <td class="no"></td> <!-- Alpha --> - <td class="no"></td> <!-- Blackfin --> <td class="no"></td> <!-- CellSPU --> <td class="yes"></td> <!-- MBlaze --> <td class="no"></td> <!-- MSP430 --> @@ -2321,7 +2314,6 @@ is the key:</p> <td><a href="#feat_tailcall">tail calls</a></td> <td class="yes"></td> <!-- ARM --> <td class="unknown"></td> <!-- Alpha --> - <td class="no"></td> <!-- Blackfin --> <td class="no"></td> <!-- CellSPU --> <td class="no"></td> <!-- MBlaze --> <td class="unknown"></td> <!-- MSP430 --> diff --git a/docs/ReleaseNotes.html b/docs/ReleaseNotes.html index e7f318a6f4..ce5804b900 100644 --- a/docs/ReleaseNotes.html +++ b/docs/ReleaseNotes.html @@ -759,7 +759,7 @@ components, please contact us on the <a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev">LLVMdev list</a>.</p> <ul> -<li>The Alpha, Blackfin, CellSPU, MicroBlaze, MSP430, MIPS, PTX, +<li>The Alpha, CellSPU, MicroBlaze, MSP430, MIPS, PTX, and XCore backends are experimental.</li> <li><tt>llc</tt> "<tt>-filetype=obj</tt>" is experimental on all targets other than darwin and ELF X86 systems.</li> diff --git a/include/llvm/ADT/Triple.h b/include/llvm/ADT/Triple.h index 36f8b777d9..173d0e2d57 100644 --- a/include/llvm/ADT/Triple.h +++ b/include/llvm/ADT/Triple.h @@ -45,7 +45,6 @@ public: alpha, // Alpha: alpha arm, // ARM; arm, armv.*, xscale |