diff options
| -rw-r--r-- | lib/Target/Alpha/AlphaISelPattern.cpp | 4 | ||||
| -rw-r--r-- | lib/Target/Alpha/AlphaRegisterInfo.td | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp index a3570bc815..a121beb468 100644 --- a/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/lib/Target/Alpha/AlphaISelPattern.cpp @@ -40,8 +40,8 @@ namespace { AlphaTargetLowering(TargetMachine &TM) : TargetLowering(TM) { // Set up the TargetLowering object. //I am having problems with shr n ubyte 1 - setShiftAmountType(MVT::i64); //are these needed? - setSetCCResultType(MVT::i64); //are these needed? + setShiftAmountType(MVT::i64); + setSetCCResultType(MVT::i64); addRegisterClass(MVT::i64, Alpha::GPRCRegisterClass); addRegisterClass(MVT::f64, Alpha::FPRCRegisterClass); diff --git a/lib/Target/Alpha/AlphaRegisterInfo.td b/lib/Target/Alpha/AlphaRegisterInfo.td index 011a23bd57..4165002937 100644 --- a/lib/Target/Alpha/AlphaRegisterInfo.td +++ b/lib/Target/Alpha/AlphaRegisterInfo.td @@ -81,7 +81,7 @@ def GPRC : RegisterClass<i64, 64, //Volitle [R0, R1, R2, R3, R4, R5, R6, R7, R8, R16, R17, R18, R19, R20, R21, R22, R23, R24, R25, R27, //Non-Volitile - R9, R10, R11, R12, R13, R14, R15, R26, /*R28,*/ R29, R30 /*, R31*/ ]>; + R9, R10, R11, R12, R13, R14, R15, R26, /*R28,*/ R29, /* R30, R31*/ ]>; //R28 is reserved for the assembler //Don't allocate 15, 29, 30, 31 |