diff options
| -rw-r--r-- | lib/Target/ARM/ARM.td | 13 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMSubtarget.cpp | 14 |
2 files changed, 16 insertions, 11 deletions
diff --git a/lib/Target/ARM/ARM.td b/lib/Target/ARM/ARM.td index 931c81c5b6..50d54b436e 100644 --- a/lib/Target/ARM/ARM.td +++ b/lib/Target/ARM/ARM.td @@ -49,14 +49,8 @@ def FeatureFP16 : SubtargetFeature<"fp16", "HasFP16", "true", // FIXME: Currently, this is only flagged for Cortex-A8. It may be true for // others as well. We should do more benchmarking and confirm one way or // the other. -def FeatureHasSlowVMLx : SubtargetFeature<"vmlx", "SlowVMLx", "true", - "Disable VFP MAC instructions">; -// Some processors benefit from using NEON instructions for scalar -// single-precision FP operations. -def FeatureNEONForFP : SubtargetFeature<"neonfp", "UseNEONForSinglePrecisionFP", - "true", - "Use NEON for single precision FP">; - +def HasSlowVMLx : SubtargetFeature<"vmlx", "SlowVMLx", "true", + "Disable VFP MAC instructions">; //===----------------------------------------------------------------------===// // ARM Processors supported. @@ -121,8 +115,7 @@ def : Processor<"arm1156t2f-s", ARMV6Itineraries, // V7 Processors. def : Processor<"cortex-a8", CortexA8Itineraries, - [ArchV7A, FeatureThumb2, FeatureNEON, FeatureHasSlowVMLx, - FeatureNEONForFP]>; + [ArchV7A, FeatureThumb2, FeatureNEON, HasSlowVMLx]>; def : ProcNoItin<"cortex-a9", [ArchV7A, FeatureThumb2, FeatureNEON]>; //===----------------------------------------------------------------------===// diff --git a/lib/Target/ARM/ARMSubtarget.cpp b/lib/Target/ARM/ARMSubtarget.cpp index 9e55cd8700..76ed66fe7d 100644 --- a/lib/Target/ARM/ARMSubtarget.cpp +++ b/lib/Target/ARM/ARMSubtarget.cpp @@ -22,6 +22,10 @@ using namespace llvm; static cl::opt<bool> ReserveR9("arm-reserve-r9", cl::Hidden, cl::desc("Reserve R9, making it unavailable as GPR")); +static cl::opt<bool> +UseNEONFP("arm-use-neon-fp", + cl::desc("Use NEON for single-precision FP"), + cl::init(false), cl::Hidden); static cl::opt<bool> UseMOVT("arm-use-movt", @@ -31,7 +35,7 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &FS, bool isT) : ARMArchVersion(V4) , ARMFPUType(None) - , UseNEONForSinglePrecisionFP(false) + , UseNEONForSinglePrecisionFP(UseNEONFP) , SlowVMLx(false) , IsThumb(isT) , ThumbMode(Thumb1) @@ -112,6 +116,14 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &FS, if (!isThumb() || hasThumb2()) PostRAScheduler = true; + + // Set CPU specific features. + if (CPUString == "cortex-a8") { + // On Cortex-a8, it's faster to perform some single-precision FP + // operations with NEON instructions. + if (UseNEONFP.getPosition() == 0) + UseNEONForSinglePrecisionFP = true; + } } /// GVIsIndirectSymbol - true if the GV will be accessed via an indirect symbol. |