diff options
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 2 | ||||
| -rw-r--r-- | test/MC/ARM/basic-thumb2-instructions.s | 18 |
2 files changed, 20 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index a30f761cef..818735561c 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -4962,6 +4962,8 @@ def : MnemonicAlias<"uhsubaddx", "uhsax">; def : MnemonicAlias<"uqaddsubx", "uqasx">; // UQSAX == UQSUBADDX def : MnemonicAlias<"uqsubaddx", "uqsax">; +// USAX == USUBADDX +def : MnemonicAlias<"usubaddx", "usax">; // LDRSBT/LDRHT/LDRSHT post-index offset if optional. // Note that the write-back output register is a dummy operand for MC (it's diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s index 3732fd264e..8c69056ac7 100644 --- a/test/MC/ARM/basic-thumb2-instructions.s +++ b/test/MC/ARM/basic-thumb2-instructions.s @@ -2912,3 +2912,21 @@ _func: @ CHECK: usat16 r2, #2, r7 @ encoding: [0xa7,0xf3,0x02,0x02] @ CHECK: usat16 r3, #15, r5 @ encoding: [0xa5,0xf3,0x0f,0x03] + + +@------------------------------------------------------------------------------ +@ USAX +@------------------------------------------------------------------------------ + usax r2, r3, r4 + it ne + usaxne r6, r1, r9 + usubaddx r2, r3, r4 + it ne + usubaddxne r6, r1, r9 + +@ CHECK: usax r2, r3, r4 @ encoding: [0xe3,0xfa,0x44,0xf2] +@ CHECK: it ne @ encoding: [0x18,0xbf] +@ CHECK: usaxne r6, r1, r9 @ encoding: [0xe1,0xfa,0x49,0xf6] +@ CHECK: usax r2, r3, r4 @ encoding: [0xe3,0xfa,0x44,0xf2] +@ CHECK: it ne @ encoding: [0x18,0xbf] +@ CHECK: usaxne r6, r1, r9 @ encoding: [0xe1,0xfa,0x49,0xf6] |