diff options
| -rw-r--r-- | include/llvm/MC/MCRegisterInfo.h | 4 | ||||
| -rw-r--r-- | include/llvm/Target/TargetRegisterInfo.h | 3 | ||||
| -rw-r--r-- | utils/TableGen/RegisterInfoEmitter.cpp | 4 |
3 files changed, 4 insertions, 7 deletions
diff --git a/include/llvm/MC/MCRegisterInfo.h b/include/llvm/MC/MCRegisterInfo.h index c2ec08e7b2..7b16e7b1d4 100644 --- a/include/llvm/MC/MCRegisterInfo.h +++ b/include/llvm/MC/MCRegisterInfo.h @@ -20,7 +20,7 @@ namespace llvm { -/// TargetRegisterDesc - This record contains all of the information known about +/// MCRegisterDesc - This record contains all of the information known about /// a particular register. The Overlaps field contains a pointer to a zero /// terminated array of registers that this register aliases, starting with /// itself. This is needed for architectures like X86 which have AL alias AX @@ -38,7 +38,7 @@ struct MCRegisterDesc { }; /// MCRegisterInfo base class - We assume that the target defines a static -/// array of TargetRegisterDesc objects that represent all of the machine +/// array of MCRegisterDesc objects that represent all of the machine /// registers that the target has. As such, we simply have to track a pointer /// to this array so that we can turn register number into a register /// descriptor. diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h index 2b7e1f9bde..d50bfe7eec 100644 --- a/include/llvm/Target/TargetRegisterInfo.h +++ b/include/llvm/Target/TargetRegisterInfo.h @@ -256,9 +256,6 @@ public: bool isAllocatable() const { return Allocatable; } }; -/// TargetRegisterDesc - It's just an alias of MCRegisterDesc. -typedef MCRegisterDesc TargetRegisterDesc; - /// TargetRegisterInfoDesc - Extra information, not in MCRegisterDesc, about /// registers. These are used by codegen, not by MC. struct TargetRegisterInfoDesc { diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp index 6fd8bb4772..9a1db978c4 100644 --- a/utils/TableGen/RegisterInfoEmitter.cpp +++ b/utils/TableGen/RegisterInfoEmitter.cpp @@ -79,7 +79,7 @@ void RegisterInfoEmitter::runHeader(raw_ostream &OS) { OS << "struct " << ClassName << " : public TargetRegisterInfo {\n" << " explicit " << ClassName - << "(const TargetRegisterDesc *D, const TargetRegisterInfoDesc *ID, " + << "(const MCRegisterDesc *D, const TargetRegisterInfoDesc *ID, " << "int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);\n" << " virtual int getDwarfRegNumFull(unsigned RegNum, " << "unsigned Flavour) const;\n" @@ -518,7 +518,7 @@ void RegisterInfoEmitter::run(raw_ostream &OS) { // Emit the constructor of the class... OS << ClassName << "::" << ClassName - << "(const TargetRegisterDesc *D, const TargetRegisterInfoDesc *ID, " + << "(const MCRegisterDesc *D, const TargetRegisterInfoDesc *ID, " << "int CallFrameSetupOpcode, int CallFrameDestroyOpcode)\n" << " : TargetRegisterInfo(ID" << ", RegisterClasses, RegisterClasses+" << RegisterClasses.size() <<",\n" |