diff options
| -rw-r--r-- | lib/Target/ARM/ARMInstrVFP.td | 14 | ||||
| -rw-r--r-- | test/MC/ARM/simple-fp-encoding.ll | 19 |
2 files changed, 27 insertions, 6 deletions
diff --git a/lib/Target/ARM/ARMInstrVFP.td b/lib/Target/ARM/ARMInstrVFP.td index 98c5f51202..b74a46713b 100644 --- a/lib/Target/ARM/ARMInstrVFP.td +++ b/lib/Target/ARM/ARMInstrVFP.td @@ -239,13 +239,15 @@ def VMULS : ASbIn_Encode<0b11100, 0b10, 0, 0, IIC_fpMUL32, "vmul", ".f32\t$Sd, $Sn, $Sm", [(set SPR:$Sd, (fmul SPR:$Sn, SPR:$Sm))]>; -def VNMULD : ADbI<0b11100, 0b10, 1, 0, (outs DPR:$dst), (ins DPR:$a, DPR:$b), - IIC_fpMUL64, "vnmul", ".f64\t$dst, $a, $b", - [(set DPR:$dst, (fneg (fmul DPR:$a, (f64 DPR:$b))))]>; +def VNMULD : ADbI_Encode<0b11100, 0b10, 1, 0, + (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm), + IIC_fpMUL64, "vnmul", ".f64\t$Dd, $Dn, $Dm", + [(set DPR:$Dd, (fneg (fmul DPR:$Dn, (f64 DPR:$Dm))))]>; -def VNMULS : ASbI<0b11100, 0b10, 1, 0, (outs SPR:$dst), (ins SPR:$a, SPR:$b), - IIC_fpMUL32, "vnmul", ".f32\t$dst, $a, $b", - [(set SPR:$dst, (fneg (fmul SPR:$a, SPR:$b)))]>; +def VNMULS : ASbI_Encode<0b11100, 0b10, 1, 0, + (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm), + IIC_fpMUL32, "vnmul", ".f32\t$Sd, $Sn, $Sm", + [(set SPR:$Sd, (fneg (fmul SPR:$Sn, SPR:$Sm)))]>; // Match reassociated forms only if not sign dependent rounding. def : Pat<(fmul (fneg DPR:$a), (f64 DPR:$b)), diff --git a/test/MC/ARM/simple-fp-encoding.ll b/test/MC/ARM/simple-fp-encoding.ll index 136c9cb043..cf59d5bb67 100644 --- a/test/MC/ARM/simple-fp-encoding.ll +++ b/test/MC/ARM/simple-fp-encoding.ll @@ -70,6 +70,25 @@ entry: ret float %mul } +define double @f9(double %a, double %b) nounwind readnone { +entry: +; CHECK: f9 +; CHECK: vnmul.f64 d16, d17, d16 @ encoding: [0xe0,0x0b,0x61,0xee] + %mul = fmul double %a, %b + %sub = fsub double -0.000000e+00, %mul + ret double %sub +} + +define void @f10(float %a, float %b, float* %c) nounwind readnone { +entry: +; CHECK: f10 +; CHECK: vnmul.f32 s0, s1, s0 @ encoding: [0xc0,0x0a,0x20,0xee] + %mul = fmul float %a, %b + %sub = fsub float -0.000000e+00, %mul + store float %sub, float* %c, align 4 + ret void +} + define i1 @f100(double %a, double %b) nounwind readnone { entry: ; CHECK: f100 |