diff options
| -rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 8eeca013ff..6883fcbe2e 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -153,6 +153,11 @@ public: }; } // end anonymous namespace +namespace llvm { + // FIXME: TableGen this? + extern MCRegisterClass ARMMCRegisterClasses[]; // In ARMGenRegisterInfo.inc. +} + namespace { /// ARMOperand - Instances of this class represent a parsed ARM machine @@ -971,9 +976,11 @@ public: SMLoc StartLoc, SMLoc EndLoc) { KindTy Kind = RegisterList; - if (ARM::DPRRegClass.contains(Regs.front().first)) + if (llvm::ARMMCRegisterClasses[ARM::DPRRegClassID]. + contains(Regs.front().first)) Kind = DPRRegisterList; - else if (ARM::SPRRegClass.contains(Regs.front().first)) + else if (llvm::ARMMCRegisterClasses[ARM::SPRRegClassID]. + contains(Regs.front().first)) Kind = SPRRegisterList; ARMOperand *Op = new ARMOperand(Kind); |