diff options
110 files changed, 358 insertions, 358 deletions
diff --git a/test/CodeGen/ARM/2009-06-22-CoalescerBug.ll b/test/CodeGen/ARM/2009-06-22-CoalescerBug.ll index e068be74ba..7e9b066984 100644 --- a/test/CodeGen/ARM/2009-06-22-CoalescerBug.ll +++ b/test/CodeGen/ARM/2009-06-22-CoalescerBug.ll @@ -3,7 +3,7 @@ %struct.rtunion = type { i64 } %struct.rtx_def = type { i16, i8, i8, [1 x %struct.rtunion] } -define arm_apcscc void @simplify_unary_real(i8* nocapture %p) nounwind { +define void @simplify_unary_real(i8* nocapture %p) nounwind { entry: %tmp121 = load i64* null, align 4 ; <i64> [#uses=1] %0 = getelementptr %struct.rtx_def* null, i32 0, i32 3, i32 3, i32 0 ; <i64*> [#uses=1] diff --git a/test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll index 17efe00354..812f0188f1 100644 --- a/test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll +++ b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll @@ -8,11 +8,11 @@ @"\01LC16" = external constant [33 x i8], align 1 ; <[33 x i8]*> [#uses=1] @"\01LC17" = external constant [47 x i8], align 1 ; <[47 x i8]*> [#uses=1] -declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind +declare i32 @printf(i8* nocapture, ...) nounwind -declare arm_apcscc void @diff(i8*, i8*, i32, i32, i32, i32) nounwind +declare void @diff(i8*, i8*, i32, i32, i32, i32) nounwind -define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind { +define void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind { entry: br i1 undef, label %bb5, label %bb @@ -44,17 +44,17 @@ bb11: ; preds = %bb9 store i32 0, i32* @no_mat, align 4 store i32 0, i32* @no_mis, align 4 %3 = getelementptr i8* %B, i32 %0 ; <i8*> [#uses=1] - tail call arm_apcscc void @diff(i8* undef, i8* %3, i32 undef, i32 undef, i32 undef, i32 undef) nounwind + tail call void @diff(i8* undef, i8* %3, i32 undef, i32 undef, i32 undef, i32 undef) nounwind %4 = sitofp i32 undef to double ; <double> [#uses=1] %5 = fdiv double %4, 1.000000e+01 ; <double> [#uses=1] - %6 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([29 x i8]* @"\01LC12", i32 0, i32 0), double %5) nounwind ; <i32> [#uses=0] + %6 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([29 x i8]* @"\01LC12", i32 0, i32 0), double %5) nounwind ; <i32> [#uses=0] %7 = load i32* @al_len, align 4 ; <i32> [#uses=1] %8 = load i32* @no_mat, align 4 ; <i32> [#uses=1] %9 = load i32* @no_mis, align 4 ; <i32> [#uses=1] %10 = sub i32 %7, %8 ; <i32> [#uses=1] %11 = sub i32 %10, %9 ; <i32> [#uses=1] - %12 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC16", i32 0, i32 0), i32 %11) nounwind ; <i32> [#uses=0] - %13 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([47 x i8]* @"\01LC17", i32 0, i32 0), i32 undef, i32 %1, i32 undef, i32 undef) nounwind ; <i32> [#uses=0] + %12 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC16", i32 0, i32 0), i32 %11) nounwind ; <i32> [#uses=0] + %13 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([47 x i8]* @"\01LC17", i32 0, i32 0), i32 undef, i32 %1, i32 undef, i32 undef) nounwind ; <i32> [#uses=0] br i1 undef, label %bb15, label %bb12 bb12: ; preds = %bb11 diff --git a/test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll index f520be3946..f5fb97c0ef 100644 --- a/test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll +++ b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll @@ -6,11 +6,11 @@ @"\01LC15" = external constant [33 x i8], align 1 ; <[33 x i8]*> [#uses=1] @"\01LC17" = external constant [47 x i8], align 1 ; <[47 x i8]*> [#uses=1] -declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind +declare i32 @printf(i8* nocapture, ...) nounwind -declare arm_apcscc void @diff(i8*, i8*, i32, i32, i32, i32) nounwind +declare void @diff(i8*, i8*, i32, i32, i32, i32) nounwind -define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind { +define void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind { entry: br i1 undef, label %bb5, label %bb @@ -41,11 +41,11 @@ bb11: ; preds = %bb9 store i32 0, i32* @no_mat, align 4 store i32 0, i32* @no_mis, align 4 %4 = getelementptr i8* %B, i32 %0 ; <i8*> [#uses=1] - tail call arm_apcscc void @diff(i8* undef, i8* %4, i32 undef, i32 %3, i32 undef, i32 undef) nounwind - %5 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC11", i32 0, i32 0), i32 %tmp13) nounwind ; <i32> [#uses=0] + tail call void @diff(i8* undef, i8* %4, i32 undef, i32 %3, i32 undef, i32 undef) nounwind + %5 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC11", i32 0, i32 0), i32 %tmp13) nounwind ; <i32> [#uses=0] %6 = load i32* @no_mis, align 4 ; <i32> [#uses=1] - %7 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC15", i32 0, i32 0), i32 %6) nounwind ; <i32> [#uses=0] - %8 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([47 x i8]* @"\01LC17", i32 0, i32 0), i32 undef, i32 %1, i32 undef, i32 %2) nounwind ; <i32> [#uses=0] + %7 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC15", i32 0, i32 0), i32 %6) nounwind ; <i32> [#uses=0] + %8 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([47 x i8]* @"\01LC17", i32 0, i32 0), i32 undef, i32 %1, i32 undef, i32 %2) nounwind ; <i32> [#uses=0] br i1 undef, label %bb15, label %bb12 bb12: ; preds = %bb11 diff --git a/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll index eee6ff98c6..d7e4c90abb 100644 --- a/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll +++ b/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll @@ -2,7 +2,7 @@ @JJ = external global i32* ; <i32**> [#uses=1] -define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind { +define void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind { entry: br i1 undef, label %bb5, label %bb diff --g |