diff options
| -rw-r--r-- | lib/Target/PowerPC/PPCAsmPrinter.cpp | 8 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCISelPattern.cpp | 6 |
2 files changed, 13 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp index a50a437893..025ce9824b 100644 --- a/lib/Target/PowerPC/PPCAsmPrinter.cpp +++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp @@ -349,7 +349,13 @@ void PowerPCAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) { return; case MachineOperand::MO_ExternalSymbol: - O << MO.getSymbolName(); + if (IsCallOp) { + std::string Name(GlobalPrefix); Name += MO.getSymbolName(); + FnStubs.insert(Name); + O << "L" << Name << "$stub"; + return; + } + O << GlobalPrefix << MO.getSymbolName(); return; case MachineOperand::MO_GlobalAddress: { diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp index 823fef9b25..451ff031c6 100644 --- a/lib/Target/PowerPC/PPCISelPattern.cpp +++ b/lib/Target/PowerPC/PPCISelPattern.cpp @@ -47,6 +47,10 @@ namespace { addRegisterClass(MVT::f32, PPC32::FPRCRegisterClass); addRegisterClass(MVT::f64, PPC32::FPRCRegisterClass); + setOperationAction(ISD::MEMMOVE, MVT::Other, Expand); + setOperationAction(ISD::MEMSET, MVT::Other, Expand); + setOperationAction(ISD::MEMCPY, MVT::Other, Expand); + computeRegisterProperties(); } @@ -372,6 +376,7 @@ LowerVAArgNext(bool isVANext, SDOperand Chain, SDOperand VAList, std::pair<SDOperand, SDOperand> PPC32TargetLowering:: LowerFrameReturnAddress(bool isFrameAddress, SDOperand Chain, unsigned Depth, SelectionDAG &DAG) { + assert(0 && "LowerFrameReturnAddress unimplemented"); abort(); } @@ -1072,6 +1077,7 @@ unsigned ISel::SelectExpr(SDOperand N) { case ISD::FP_TO_UINT: case ISD::FP_TO_SINT: + assert(0 && "FP_TO_S/UINT unimplemented"); abort(); case ISD::SETCC: |