diff options
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrAltivec.td | 8 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrFormats.td | 20 |
2 files changed, 24 insertions, 4 deletions
diff --git a/lib/Target/PowerPC/PPCInstrAltivec.td b/lib/Target/PowerPC/PPCInstrAltivec.td index 360f7db3e5..f1b4ab7d45 100644 --- a/lib/Target/PowerPC/PPCInstrAltivec.td +++ b/lib/Target/PowerPC/PPCInstrAltivec.td @@ -116,16 +116,16 @@ def VNMSUBFP: VAForm_1<47, (ops VRRC:$vD, VRRC:$vA, VRRC:$vC, VRRC:$vB), VRRC:$vB)))]>, Requires<[FPContractions]>; -def VPERM : VAForm_1<43, (ops VRRC:$vD, VRRC:$vA, VRRC:$vC, VRRC:$vB), - "vperm $vD, $vA, $vB, $vC", VecPerm, - [(set VRRC:$vD, +def VPERM : VAForm_1a<43, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, VRRC:$vC), + "vperm $vD, $vA, $vB, $vC", VecPerm, + [(set VRRC:$vD, (PPCvperm (v4f32 VRRC:$vA), VRRC:$vB, VRRC:$vC))]>; def VSLDOI : VAForm_2<44, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, u5imm:$SH), "vsldoi $vD, $vA, $vB, $SH", VecFP, [(set VRRC:$vD, (int_ppc_altivec_vsldoi VRRC:$vA, VRRC:$vB, imm:$SH))]>; -def VSEL : VAForm_1<42, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, VRRC:$vC), +def VSEL : VAForm_1a<42, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, VRRC:$vC), "vsel $vD, $vA, $vB, $vC", VecFP, [(set VRRC:$vD, (int_ppc_altivec_vsel VRRC:$vA, VRRC:$vB, VRRC:$vC))]>; diff --git a/lib/Target/PowerPC/PPCInstrFormats.td b/lib/Target/PowerPC/PPCInstrFormats.td index 9f87b278e6..805e1258c5 100644 --- a/lib/Target/PowerPC/PPCInstrFormats.td +++ b/lib/Target/PowerPC/PPCInstrFormats.td @@ -590,6 +590,8 @@ class MDForm_1<bits<6> opcode, bits<3> xo, dag OL, string asmstr, } // E-1 VA-Form + +// VAForm_1 - DACB ordering. class VAForm_1<bits<6> xo, dag OL, string asmstr, InstrItinClass itin, list<dag> pattern> : I<4, OL, asmstr, itin> { @@ -607,6 +609,24 @@ class VAForm_1<bits<6> xo, dag OL, string asmstr, let Inst{26-31} = xo; } +// VAForm_1a - DABC ordering. +class VAForm_1a<bits<6> xo, dag OL, string asmstr, + InstrItinClass itin, list<dag> pattern> + : I<4, OL, asmstr, itin> { + bits<5> VD; + bits<5> VA; + bits<5> VB; + bits<5> VC; + + let Pattern = pattern; + + let Inst{6-10} = VD; + let Inst{11-15} = VA; + let Inst{16-20} = VB; + let Inst{21-25} = VC; + let Inst{26-31} = xo; +} + class VAForm_2<bits<6> xo, dag OL, string asmstr, InstrItinClass itin, list<dag> pattern> : I<4, OL, asmstr, itin> { |