aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--include/llvm/CodeGen/SelectionDAG.h52
-rw-r--r--include/llvm/Target/TargetLowering.h6
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAG.cpp80
-rw-r--r--lib/Target/ARM/ARMISelLowering.cpp26
-rw-r--r--lib/Target/ARM/ARMISelLowering.h2
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp51
6 files changed, 141 insertions, 76 deletions
diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h
index 5f226e83d5..433896ed2e 100644
--- a/include/llvm/CodeGen/SelectionDAG.h
+++ b/include/llvm/CodeGen/SelectionDAG.h
@@ -325,6 +325,10 @@ public:
return getNode(ISD::CopyToReg, MVT::Other, Chain,
getRegister(Reg, N.getValueType()), N);
}
+ SDValue getCopyToReg(SDValue Chain, DebugLoc dl, unsigned Reg, SDValue N) {
+ return getNode(ISD::CopyToReg, dl, MVT::Other, Chain,
+ getRegister(Reg, N.getValueType()), N);
+ }
// This version of the getCopyToReg method takes an extra operand, which
// indicates that there is potentially an incoming flag value (if Flag is not
@@ -335,6 +339,12 @@ public:
SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Flag };
return getNode(ISD::CopyToReg, VTs, 2, Ops, Flag.getNode() ? 4 : 3);
}
+ SDValue getCopyToReg(SDValue Chain, DebugLoc dl, unsigned Reg, SDValue N,
+ SDValue Flag) {
+ const MVT *VTs = getNodeValueTypes(MVT::Other, MVT::Flag);
+ SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Flag };
+ return getNode(ISD::CopyToReg, dl, VTs, 2, Ops, Flag.getNode() ? 4 : 3);
+ }
// Similar to last getCopyToReg() except parameter Reg is a SDValue
SDValue getCopyToReg(SDValue Chain, SDValue Reg, SDValue N,
@@ -343,12 +353,23 @@ public:
SDValue Ops[] = { Chain, Reg, N, Flag };
return getNode(ISD::CopyToReg, VTs, 2, Ops, Flag.getNode() ? 4 : 3);
}
+ SDValue getCopyToReg(SDValue Chain, DebugLoc dl, SDValue Reg, SDValue N,
+ SDValue Flag) {
+ const MVT *VTs = getNodeValueTypes(MVT::Other, MVT::Flag);
+ SDValue Ops[] = { Chain, Reg, N, Flag };
+ return getNode(ISD::CopyToReg, dl, VTs, 2, Ops, Flag.getNode() ? 4 : 3);
+ }
SDValue getCopyFromReg(SDValue Chain, unsigned Reg, MVT VT) {
const MVT *VTs = getNodeValueTypes(VT, MVT::Other);
SDValue Ops[] = { Chain, getRegister(Reg, VT) };
return getNode(ISD::CopyFromReg, VTs, 2, Ops, 2);
}
+ SDValue getCopyFromReg(SDValue Chain, DebugLoc dl, unsigned Reg, MVT VT) {
+ const MVT *VTs = getNodeValueTypes(VT, MVT::Other);
+ SDValue Ops[] = { Chain, getRegister(Reg, VT) };
+ return getNode(ISD::CopyFromReg, dl, VTs, 2, Ops, 2);
+ }
// This version of the getCopyFromReg method takes an extra operand, which
// indicates that there is potentially an incoming flag value (if Flag is not
@@ -359,6 +380,12 @@ public:
SDValue Ops[] = { Chain, getRegister(Reg, VT), Flag };
return getNode(ISD::CopyFromReg, VTs, 3, Ops, Flag.getNode() ? 3 : 2);
}
+ SDValue getCopyFromReg(SDValue Chain, DebugLoc dl, unsigned Reg, MVT VT,
+ SDValue Flag) {
+ const MVT *VTs = getNodeValueTypes(VT, MVT::Other, MVT::Flag);
+ SDValue Ops[] = { Chain, getRegister(Reg, VT), Flag };
+ return getNode(ISD::CopyFromReg, dl, VTs, 3, Ops, Flag.getNode() ? 3 : 2);
+ }
SDValue getCondCode(ISD::CondCode Cond);
@@ -366,6 +393,9 @@ public:
/// disappear in the future and most targets don't support it.
SDValue getConvertRndSat(MVT VT, SDValue Val, SDValue DTy, SDValue STy,
SDValue Rnd, SDValue Sat, ISD::CvtCode Code);
+ SDValue getConvertRndSat(MVT VT, DebugLoc dl, SDValue Val, SDValue DTy,
+ SDValue STy,
+ SDValue Rnd, SDValue Sat, ISD::CvtCode Code);
/// getZeroExtendInReg - Return the expression required to zero extend the Op
/// value assuming it was the smaller SrcTy value.
@@ -466,15 +496,35 @@ public:
SDValue getMemcpy(SDValue Chain, SDValue Dst, SDValue Src,
SDValue Size, unsigned Align, bool AlwaysInline,
const Value *DstSV, uint64_t DstSVOff,
+ const Value *SrcSV, uint64_t SrcSVOff) {
+ return getMemcpy(Chain, DebugLoc::getUnknownLoc(), Dst, Src, Size, Align,
+ AlwaysInline, DstSV, DstSVOff, SrcSV, SrcSVOff);
+ }
+ SDValue getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, SDValue Src,
+ SDValue Size, unsigned Align, bool AlwaysInline,
+ const Value *DstSV, uint64_t DstSVOff,
const Value *SrcSV, uint64_t SrcSVOff);
SDValue getMemmove(SDValue Chain, SDValue Dst, SDValue Src,
SDValue Size, unsigned Align,
const Value *DstSV, uint64_t DstOSVff,
+ const Value *SrcSV, uint64_t SrcSVOff) {
+ return getMemmove(Chain, DebugLoc::getUnknownLoc(), Dst, Src, Size, Align,
+ DstSV, DstOSVff, SrcSV, SrcSVOff);
+ }
+ SDValue getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, SDValue Src,
+ SDValue Size, unsigned Align,
+ const Value *DstSV, uint64_t DstOSVff,
const Value *SrcSV, uint64_t SrcSVOff);
SDValue getMemset(SDValue Chain, SDValue Dst, SDValue Src,
SDValue Size, unsigned Align,
+ const Value *DstSV, uint64_t DstSVOff) {
+ return getMemset(Chain, DebugLoc::getUnknownLoc(), Dst, Src, Size, Align,
+ DstSV, DstSVOff);
+ }
+ SDValue getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, SDValue Src,
+ SDValue Size, unsigned Align,
const Value *DstSV, uint64_t DstSVOff);
/// getSetCC - Helper function to make it easier to build SetCC's if you just
@@ -521,6 +571,8 @@ public:
/// and a source value as input.
SDValue getVAArg(MVT VT, SDValue Chain, SDValue Ptr,
SDValue SV);
+ SDValue getVAArg(MVT VT, DebugLoc dl, SDValue Chain, SDValue Ptr,
+ SDValue SV);
/// getAtomic - Gets a node for an atomic op, produces result and chain and
/// takes 3 operands
diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h
index 6639db1e00..1004508fbe 100644
--- a/include/llvm/Target/TargetLowering.h
+++ b/include/llvm/Target/TargetLowering.h
@@ -1101,7 +1101,7 @@ public:
/// for another call). If the target chooses to decline an AlwaysInline
/// request here, legalize will resort to using simple loads and stores.
virtual SDValue
- EmitTargetCodeForMemcpy(SelectionDAG &DAG,
+ EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
SDValue Chain,
SDValue Op1, SDValue Op2,
SDValue Op3, unsigned Align,
@@ -1118,7 +1118,7 @@ public:
/// SDValue if the target declines to use custom code and a different
/// lowering strategy should be used.
virtual SDValue
- EmitTargetCodeForMemmove(SelectionDAG &DAG,
+ EmitTargetCodeForMemmove(SelectionDAG &DAG, DebugLoc dl,
SDValue Chain,
SDValue Op1, SDValue Op2,
SDValue Op3, unsigned Align,
@@ -1134,7 +1134,7 @@ public:
/// SDValue if the target declines to use custom code and a different
/// lowering strategy should be used.
virtual SDValue
- EmitTargetCodeForMemset(SelectionDAG &DAG,
+ EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl,
SDValue Chain,
SDValue Op1, SDValue Op2,
SDValue Op3, unsigned Align,
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 82cc3263ed..79ffa40180 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -2927,7 +2927,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
/// getMemsetValue - Vectorized representation of the memset value
/// operand.
-static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) {
+static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG,
+ DebugLoc dl) {
unsigned NumBits = VT.isVector() ?
VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
@@ -2943,11 +2944,11 @@ static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) {
}
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
- Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value);
+ Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
unsigned Shift = 8;
for (unsigned i = NumBits; i > 8; i >>= 1) {
- Value = DAG.getNode(ISD::OR, VT,
- DAG.getNode(ISD::SHL, VT, Value,
+ Value = DAG.getNode(ISD::OR, dl, VT,
+ DAG.getNode(ISD::SHL, dl, VT, Value,
DAG.getConstant(Shift,
TLI.getShiftAmountTy())),
Value);
@@ -2960,7 +2961,7 @@ static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) {
/// getMemsetStringVal - Similar to getMemsetValue. Except this is only
/// used when a memcpy is turned into a memset when the source is a constant
/// string ptr.
-static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG,
+static SDValue getMemsetStringVal(MVT VT, DebugLoc dl, SelectionDAG &DAG,
const TargetLowering &TLI,
std::string &Str, unsigned Offset) {
// Handle vector with all elements zero.
@@ -2969,7 +2970,7 @@ static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG,
return DAG.getConstant(0, VT);
unsigned NumElts = VT.getVectorNumElements();
MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
- return DAG.getNode(ISD::BIT_CONVERT, VT,
+ return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
}
@@ -3104,7 +3105,7 @@ bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
return true;
}
-static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG,
+static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
SDValue Chain, SDValue Dst,
SDValue Src, uint64_t Size,
unsigned Align, bool AlwaysInline,
@@ -3141,15 +3142,15 @@ static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG,
// We also handle store a vector with all zero's.
// FIXME: Handle other cases where store of vector immediate is done in
// a single instruction.
- Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff);
- Store = DAG.getStore(Chain, Value,
+ Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
+ Store = DAG.getStore(Chain, dl, Value,
getMemBasePlusOffset(Dst, DstOff, DAG),
DstSV, DstSVOff + DstOff, false, DstAlign);
} else {
- Value = DAG.getLoad(VT, Chain,
+ Value = DAG.getLoad(VT, dl, Chain,
getMemBasePlusOffset(Src, SrcOff, DAG),
SrcSV, SrcSVOff + SrcOff, false, Align);
- Store = DAG.getStore(Chain, Value,
+ Store = DAG.getStore(Chain, dl, Value,
getMemBasePlusOffset(Dst, DstOff, DAG),
DstSV, DstSVOff + DstOff, false, DstAlign);
}
@@ -3158,11 +3159,11 @@ static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG,
DstOff += VTSize;
}
- return DAG.getNode(ISD::TokenFactor, MVT::Other,
+ return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
&OutChains[0], OutChains.size());
}
-static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG,
+static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
SDValue Chain, SDValue Dst,
SDValue Src, uint64_t Size,
unsigned Align, bool AlwaysInline,
@@ -3194,14 +3195,14 @@ static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG,
unsigned VTSize = VT.getSizeInBits() / 8;
SDValue Value, Store;
- Value = DAG.getLoad(VT, Chain,
+ Value = DAG.getLoad(VT, dl, Chain,
getMemBasePlusOffset(Src, SrcOff, DAG),
SrcSV, SrcSVOff + SrcOff, false, Align);
LoadValues.push_back(Value);
LoadChains.push_back(Value.getValue(1));
SrcOff += VTSize;
}
- Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
+ Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
&LoadChains[0], LoadChains.size());
OutChains.clear();
for (unsigned i = 0; i < NumMemOps; i++) {
@@ -3209,18 +3210,18 @@ static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG,
unsigned VTSize = VT.getSizeInBits() / 8;
SDValue Value, Store;
- Store = DAG.getStore(Chain, LoadValues[i],
+ Store = DAG.getStore(Chain, dl, LoadValues[i],
getMemBasePlusOffset(Dst, DstOff, DAG),
DstSV, DstSVOff + DstOff, false, DstAlign);
OutChains.push_back(Store);
DstOff += VTSize;
}
- return DAG.getNode(ISD::TokenFactor, MVT::Other,
+ return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
&OutChains[0], OutChains.size());
}
-static SDValue getMemsetStores(SelectionDAG &DAG,
+static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
SDValue Chain, SDValue Dst,
SDValue Src, uint64_t Size,
unsigned Align,
@@ -3243,19 +3244,19 @@ static SDValue getMemsetStores(SelectionDAG &DAG,
for (unsigned i = 0; i < NumMemOps; i++) {
MVT VT = MemOps[i];
unsigned VTSize = VT.getSizeInBits() / 8;
- SDValue Value = getMemsetValue(Src, VT, DAG);
- SDValue Store = DAG.getStore(Chain, Value,
+ SDValue Value = getMemsetValue(Src, VT, DAG, dl);
+ SDValue Store = DAG.getStore(Chain, dl, Value,
getMemBasePlusOffset(Dst, DstOff, DAG),
DstSV, DstSVOff + DstOff);
OutChains.push_back(Store);
DstOff += VTSize;
}
- return DAG.getNode(ISD::TokenFactor, MVT::Other,
+ return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
&OutChains[0], OutChains.size());
}
-SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
+SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
SDValue Src, SDValue Size,
unsigned Align, bool AlwaysInline,
const Value *DstSV, uint64_t DstSVOff,
@@ -3270,7 +3271,7 @@ SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
return Chain;
SDValue Result =
- getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
+ getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
ConstantSize->getZExtValue(),
Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
if (Result.getNode())
@@ -3280,7 +3281,7 @@ SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
// Then check to see if we should lower the memcpy with target-specific
// code. If the target chooses to do this, this is the next best.
SDValue Result =
- TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align,
+ TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
AlwaysInline,
DstSV, DstSVOff, SrcSV, SrcSVOff);
if (Result.getNode())
@@ -3290,7 +3291,7 @@ SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
// use a (potentially long) sequence of loads and stores.
if (AlwaysInline) {
assert(ConstantSize && "AlwaysInline requires a constant size!");
- return getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
+ return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
ConstantSize->getZExtValue(), Align, true,
DstSV, DstSVOff, SrcSV, SrcSVOff);
}
@@ -3307,11 +3308,11 @@ SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
TLI.LowerCallTo(Chain, Type::VoidTy,
false, false, false, false, CallingConv::C, false,
getExternalSymbol("memcpy", TLI.getPointerTy()),
- Args, *this, DebugLoc::getUnknownLoc());
+ Args, *this, dl);
return CallResult.second;
}
-SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
+SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
SDValue Src, SDValue Size,
unsigned Align,
const Value *DstSV, uint64_t DstSVOff,
@@ -3326,7 +3327,7 @@ SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
return Chain;
SDValue Result =
- getMemmoveLoadsAndStores(*this, Chain, Dst, Src,
+ getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
ConstantSize->getZExtValue(),
Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
if (Result.getNode())
@@ -3336,7 +3337,7 @@ SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
// Then check to see if we should lower the memmove with target-specific
// code. If the target chooses to do this, this is the next best.
SDValue Result =
- TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align,
+ TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align,
DstSV, DstSVOff, SrcSV, SrcSVOff);
if (Result.getNode())
return Result;
@@ -3353,11 +3354,11 @@ SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
TLI.LowerCallTo(Chain, Type::VoidTy,
false, false, false, false, CallingConv::C, false,
getExternalSymbol("memmove", TLI.getPointerTy()),
- Args, *this, DebugLoc::getUnknownLoc());
+ Args, *this, dl);
return CallResult.second;
}
-SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
+SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
SDValue Src, SDValue Size,
unsigned Align,
const Value *DstSV, uint64_t DstSVOff) {
@@ -3371,7 +3372,7 @@ SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
return Chain;
SDValue Result =
- getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(),
+ getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
Align, DstSV, DstSVOff);
if (Result.getNode())
return Result;
@@ -3380,7 +3381,7 @@ SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
// Then check to see if we should lower the memset with target-specific
// code. If the target chooses to do this, this is the next best.
SDValue Result =
- TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align,
+ TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align,
DstSV, DstSVOff);
if (Result.getNode())
return Result;
@@ -3393,9 +3394,9 @@ SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
Args.push_back(Entry);
// Extend or truncate the argument to be an i32 value for the call.
if (Src.getValueType().bitsGT(MVT::i32))
- Src = getNode(ISD::TRUNCATE, MVT::i32, Src);
+ Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
else
- Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src);
+ Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
Args.push_back(Entry);
Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
@@ -3405,7 +3406,7 @@ SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
TLI.LowerCallTo(Chain, Type::VoidTy,
false, false, false, false, CallingConv::C, false,
getExternalSymbol("memset", TLI.getPointerTy()),
- Args, *this, DebugLoc::getUnknownLoc());
+ Args, *this, dl);
return CallResult.second;
}
@@ -4043,6 +4044,13 @@ SDValue SelectionDAG::getVAArg(MVT VT,
return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3);
}
+SDValue SelectionDAG::getVAArg(MVT VT, DebugLoc dl,
+ SDValue Chain, SDValue Ptr,
+ SDValue SV) {
+ SDValue Ops[] = { Chain, Ptr, SV };
+ return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
+}
+
SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
const SDUse *Ops, unsigned NumOps) {
return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps);
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 9067c2d478..504a5c4e72 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -1242,7 +1242,7 @@ static SDValue LowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) {
}
SDValue
-ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
+ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
SDValue Chain,
SDValue Dst, SDValue Src,
SDValue Size, unsigned Align,
@@ -1279,24 +1279,24 @@ ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
while (EmittedNumMemOps < NumMemOps) {
for (i = 0;
i < MAX_LOADS_IN_LDM && EmittedNumMemOps + i < NumMemOps; ++i) {
- Loads[i] = DAG.getLoad(VT, Chain,
- DAG.getNode(ISD::ADD, MVT::i32, Src,
+ Loads[i] = DAG.getLoad(VT, dl, Chain,
+ DAG.getNode(ISD::ADD, dl, MVT::i32, Src,
DAG.getConstant(SrcOff, MVT::i32)),
SrcSV, SrcSVOff + SrcOff);
TFOps[i] = Loads[i].getValue(1);
SrcOff += VTSize;
}
- Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, &TFOps[0], i);
+ Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
for (i = 0;
i < MAX_LOADS_IN_LDM && EmittedNumMemOps + i < NumMemOps; ++i) {
- TFOps[i] = DAG.getStore(Chain, Loads[i],
- DAG.getNode(ISD::ADD, MVT::i32, Dst,
+ TFOps[i] = DAG.getStore(Chain, dl, Loads[i],
+ DAG.getNode(ISD::ADD, dl, MVT::i32, Dst,
DAG.getConstant(DstOff, MVT::i32)),
DstSV, DstSVOff + DstOff);
DstOff += VTSize;
}
- Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, &TFOps[0], i);
+ Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
EmittedNumMemOps += i;
}
@@ -1316,8 +1316,8 @@ ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
VTSize = 1;
}
- Loads[i] = DAG.getLoad(VT, Chain,
- DAG.getNode(ISD::ADD, MVT::i32, Src,
+ Loads[i] = DAG.getLoad(VT, dl, Chain,
+ DAG.getNode(ISD::ADD, dl, MVT::i32, Src,
DAG.getConstant(SrcOff, MVT::i32)),
SrcSV, SrcSVOff + SrcOff);
TFOps[i] = Loads[i].getValue(1);
@@ -1325,7 +1325,7 @@ ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
SrcOff += VTSize;
BytesLeft -= VTSize;
}
- Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, &TFOps[0], i);
+ Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
i = 0;
BytesLeft = BytesLeftSave;
@@ -1338,15 +1338,15 @@ ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
VTSize = 1;
}
- TFOps[i] = DAG.getStore(Chain, Loads[i],
- DAG.getNode(ISD::ADD, MVT::i32, Dst,
+ TFOps[i] = DAG.getStore(Chain, dl, Loads[i],
+ DAG.getNode(ISD::ADD, dl, MVT::i32, Dst,
DAG.getConstant(DstOff, MVT::i32)),
DstSV, DstSVOff + DstOff);
++i;
DstOff += VTSize;
BytesLeft -= VTSize;
}
- return DAG.getNode(ISD::TokenFactor, MVT::Other, &TFOps[0], i);
+ return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
}
static SDValue ExpandBIT_CONVERT(SDNode *N, SelectionDAG &DAG) {
diff --git a/lib/Target/ARM/ARMISelLowering.h b/lib/Target/ARM/ARMISelLowering.h
index ab459ef354..8f044a57d0 100644
--- a/lib/Target/ARM/ARMISelLowering.h
+++ b/lib/Target/ARM/ARMISelLowering.h
@@ -149,7 +149,7 @@ namespace llvm {
SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG);
SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG);
- SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG,
+ SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
SDValue Chain,
SDValue Dst, SDValue Src,
SDValue Size, unsigned Align,
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 9955f9c4d5..3f5210789d 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -5610,7 +5610,7 @@ X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
}
SDValue
-X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG,
+X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl,
SDValue Chain,
SDValue Dst, SDValue Src,
SDValue Size, unsigned Align,
@@ -5641,12 +5641,10 @@ X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG,
Args.push_back(Entry);
Entry.Node = Size;
Args.push_back(Entry);
- // FIXME provide DebugLoc info
std::pair<SDValue,SDValue> CallResult =
LowerCallTo(Chain, Type::VoidTy, false, false, false, false,
CallingConv::C, false,
- DAG.getExternalSymbol(bzeroEntry, IntPtr), Args, DAG,
- DebugLoc::getUnknownLoc());
+ DAG.getExternalSymbol(bzeroEntry, IntPtr), Args, DAG, dl);
return CallResult.second;
}
@@ -5696,20 +5694,22 @@ X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG,
BytesLeft = SizeVal % UBytes;
}
- Chain = DAG.getCopyToReg(Chain, ValReg, DAG.getConstant(Val, AVT),
+ Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, AVT),
InFlag);
InFlag = Chain.getValue(1);
} else {
AVT = MVT::i8;
Count = DAG.getIntPtrConstant(SizeVal);
- Chain = DAG.getCopyToReg(Chain, X86::AL, Src, InFlag);
+ Chain = DAG.getCopyToReg(Chain, dl, X86::AL, Src, InFlag);
InFlag = Chain.getValue(1);
}
- Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RCX : X86::ECX,
+ Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RCX :
+ X86::ECX,
Count, InFlag);
InFlag = Chain.getValue(1);
- Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RDI : X86::EDI,
+ Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RDI :
+ X86::EDI,
Dst, InFlag);
InFlag = Chain.getValue(1);
@@ -5718,15 +5718,16 @@ X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG,
Ops.push_back(Chain);
Ops.push_back(DAG.getValueType(AVT));
Ops.push_back(InFlag);
- Chain = DAG.getNode(X86ISD::REP_STOS, Tys, &Ops[0], Ops.size());
+ Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, &Ops[0], Ops.size());
if (TwoRepStos) {
InFlag = Chain.getValue(1);
Count = Size;
MVT CVT = Count.getValueType();
- SDValue Left = DAG.getNode(ISD::AND, CVT, Count,
+ SDValue Left = DAG.getNode(ISD::AND, dl, CVT, Count,
DAG.getConstant((AVT == MVT::i64) ? 7 : 3, CVT));
- Chain = DAG.getCopyToReg(Chain, (CVT == MVT::i64) ? X86::RCX : X86::ECX,
+ Chain = DAG.getCopyToReg(Chain, dl, (CVT == MVT::i64) ? X86::RCX :
+ X86::ECX,
Left, InFlag);
InFlag = Chain.getValue(1);
Tys = DAG.getVTList(MVT::Other, MVT::Flag);
@@ -5734,15 +5735,15 @@ X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG,
Ops.push_back(Chain);
Ops.push_back(DAG.getValueType(MVT::i8));
Ops.push_back(InFlag);
- Chain = DAG.getNode(X86ISD::REP_STOS, Tys, &Ops[0], Ops.size());
+ Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, &Ops[0], Ops.size());
} else if (BytesLeft) {
// Handle the last 1 - 7 bytes.
unsigned Offset = SizeVal - BytesLeft;
MVT AddrVT = Dst.getValueType();
MVT SizeVT = Size.getValueType();
- Chain = DAG.getMemset(Chain,
- DAG.getNode(ISD::ADD, AddrVT, Dst,
+ Chain = DAG.getMemset(Chain, dl,
+ DAG.getNode(ISD::ADD, dl, AddrVT, Dst,
DAG.getConstant(Offset, AddrVT)),
Src,
DAG.getConstant(BytesLeft, SizeVT),
@@ -5754,7 +5755,7 @@ X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG,
}
SDValue
-X86TargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
+X86TargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
SDValue Chain, SDValue Dst, SDValue Src,
SDValue Size, unsigned Align,
bool AlwaysInline,
@@ -5784,13 +5785,16 @@ X86TargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
unsigned BytesLeft = SizeVal % UBytes;
SDValue InFlag(0, 0);
- Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RCX : X86::ECX,
+ Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RCX :
+ X86::ECX,
Count, InFlag);
InFlag = Chain.getValue(1);
- Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RDI : X86::EDI,
+ Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RDI :
+ X86::EDI,
Dst, InFlag);
InFlag = Chain.getValue(1);
- Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RSI : X86::ESI,
+ Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RSI :
+ X86::ESI,
Src, InFlag);
InFlag = Chain.getValue(1);
@@ -5799,7 +5803,7 @@ X86TargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
Ops.push_back(Chain);
Ops.push_back(DAG.getValueType(AVT));
Ops.push_back(InFlag);
- SDValue RepMovs = DAG.getNode(X86ISD::REP_MOVS, Tys, &Ops[0], Ops.size());
+ SDValue RepMovs = DAG.getNode(X86ISD::REP_MOVS, dl, Tys, &Ops[0], Ops.size());
SmallVector<SDValue, 4> Results;
Results.push_back(RepMovs);
@@ -5809,10 +5813,10 @@ X86TargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
MVT DstVT = Dst.getValueType();
MVT SrcVT = Src.getValueType();
MVT SizeVT = Size.getValueType();
- Results.push_back(DAG.getMemcpy(Chain,
- DAG.getNode(ISD::ADD, DstVT, Dst,
+ Results.push_back(DAG.getMemcpy(Chain, dl,
+ DAG.getNode(ISD::ADD, dl, DstVT, Dst,
DAG.getConstant(Offset, DstVT)),
- DAG.getNode(ISD::ADD, SrcVT, Src,
+ DAG.getNode(ISD::ADD, dl, SrcVT, Src,
DAG.getConstant(Offset, SrcVT)),
DAG.getConstant(BytesLeft, SizeVT),
Align, AlwaysInline,
@@ -5820,7 +5824,8 @@ X86TargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
SrcSV, SrcSVOff + Offset));
}
- return DAG.getNode(ISD::TokenFactor, MVT::Other, &Results[0], Results.size());
+ return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
+ &Results[0], Results.size());
}
SDValue X86TargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) {
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-06-28 14:27:24 +0000