diff options
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 8 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrX86-64.td | 4 |
2 files changed, 6 insertions, 6 deletions
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 2a5e17f356..e41ef7a604 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -449,14 +449,14 @@ def XCHG32rm : I<0x87, MRMSrcMem, // Bit scan instructions. let Defs = [EFLAGS] in { -def BSF16rr : I<0xBC, AddRegFrm, (outs GR16:$dst), (ins GR16:$src), +def BSF16rr : I<0xBC, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src), "bsf{w}\t{$src, $dst|$dst, $src}", [(set GR16:$dst, (X86bsf GR16:$src)), (implicit EFLAGS)]>, TB; def BSF16rm : I<0xBC, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src), "bsf{w}\t{$src, $dst|$dst, $src}", [(set GR16:$dst, (X86bsf (loadi16 addr:$src))), (implicit EFLAGS)]>, TB; -def BSF32rr : I<0xBC, AddRegFrm, (outs GR32:$dst), (ins GR32:$src), +def BSF32rr : I<0xBC, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src), "bsf{l}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (X86bsf GR32:$src)), (implicit EFLAGS)]>, TB; def BSF32rm : I<0xBC, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src), @@ -464,14 +464,14 @@ def BSF32rm : I<0xBC, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src), [(set GR32:$dst, (X86bsf (loadi32 addr:$src))), (implicit EFLAGS)]>, TB; -def BSR16rr : I<0xBD, AddRegFrm, (outs GR16:$dst), (ins GR16:$src), +def BSR16rr : I<0xBD, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src), "bsr{w}\t{$src, $dst|$dst, $src}", [(set GR16:$dst, (X86bsr GR16:$src)), (implicit EFLAGS)]>, TB; def BSR16rm : I<0xBD, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src), "bsr{w}\t{$src, $dst|$dst, $src}", [(set GR16:$dst, (X86bsr (loadi16 addr:$src))), (implicit EFLAGS)]>, TB; -def BSR32rr : I<0xBD, AddRegFrm, (outs GR32:$dst), (ins GR32:$src), +def BSR32rr : I<0xBD, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src), "bsr{l}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (X86bsr GR32:$src)), (implicit EFLAGS)]>, TB; def BSR32rm : I<0xBD, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src), diff --git a/lib/Target/X86/X86InstrX86-64.td b/lib/Target/X86/X86InstrX86-64.td index a0b956e2c1..d920b216ad 100644 --- a/lib/Target/X86/X86InstrX86-64.td +++ b/lib/Target/X86/X86InstrX86-64.td @@ -169,7 +169,7 @@ def XCHG64rm : RI<0x87, MRMSrcMem, (outs), (ins GR64:$src1, i64mem:$src2), // Bit scan instructions. let Defs = [EFLAGS] in { -def BSF64rr : RI<0xBC, AddRegFrm, (outs GR64:$dst), (ins GR64:$src), +def BSF64rr : RI<0xBC, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src), "bsf{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (X86bsf GR64:$src)), (implicit EFLAGS)]>, TB; def BSF64rm : RI<0xBC, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src), @@ -177,7 +177,7 @@ def BSF64rm : RI<0xBC, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src), [(set GR64:$dst, (X86bsf (loadi64 addr:$src))), (implicit EFLAGS)]>, TB; -def BSR64rr : RI<0xBD, AddRegFrm, (outs GR64:$dst), (ins GR64:$src), +def BSR64rr : RI<0xBD, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src), "bsr{q}\t{$src, $dst|$dst, $src}", [(set GR64:$dst, (X86bsr GR64:$src)), (implicit EFLAGS)]>, TB; def BSR64rm : RI<0xBD, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src), |