diff options
| -rw-r--r-- | lib/CodeGen/RegAllocLinearScan.cpp | 12 | ||||
| -rw-r--r-- | test/CodeGen/X86/uint_to_fp-2.ll | 8 |
2 files changed, 14 insertions, 6 deletions
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp index 1e7d0a89c1..96f8ab4e52 100644 --- a/lib/CodeGen/RegAllocLinearScan.cpp +++ b/lib/CodeGen/RegAllocLinearScan.cpp @@ -249,7 +249,7 @@ unsigned RALinScan::attemptTrivialCoalescing(LiveInterval &cur, unsigned Reg) { if ((cur.preference && cur.preference == Reg) || !cur.containsOneValue()) return Reg; - VNInfo *vni = cur.getValNumInfo(0); + VNInfo *vni = cur.begin()->valno; if (!vni->def || vni->def == ~1U || vni->def == ~0U) return Reg; MachineInstr *CopyMI = li_->getInstructionFromIndex(vni->def); @@ -686,13 +686,13 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur) unsigned StartPosition = cur->beginNumber(); const TargetRegisterClass *RCLeader = RelatedRegClasses.getLeaderValue(RC); - // If this live interval is defined by a move instruction and its source is - // assigned a physical register that is compatible with the target register - // class, then we should try to assign it the same register. + // If start of this live interval is defined by a move instruction and its + // source is assigned a physical register that is compatible with the target + // register class, then we should try to assign it the same register. // This can happen when the move is from a larger register class to a smaller // one, e.g. X86::mov32to32_. These move instructions are not coalescable. - if (!cur->preference && cur->containsOneValue()) { - VNInfo *vni = cur->getValNumInfo(0); + if (!cur->preference && cur->hasAtLeastOneValue()) { + VNInfo *vni = cur->begin()->valno; if (vni->def && vni->def != ~1U && vni->def != ~0U) { MachineInstr *CopyMI = li_->getInstructionFromIndex(vni->def); unsigned SrcReg, DstReg; diff --git a/test/CodeGen/X86/uint_to_fp-2.ll b/test/CodeGen/X86/uint_to_fp-2.ll new file mode 100644 index 0000000000..d6304370e2 --- /dev/null +++ b/test/CodeGen/X86/uint_to_fp-2.ll @@ -0,0 +1,8 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movsd | count 1 +; rdar://6504833 + +define float @f(i32 %x) nounwind readnone { +entry: + %0 = uitofp i32 %x to float + ret float %0 +} |