diff options
| -rw-r--r-- | lib/Target/X86/InstSelectSimple.cpp | 7 | ||||
| -rw-r--r-- | lib/Target/X86/X86ISelSimple.cpp | 7 |
2 files changed, 10 insertions, 4 deletions
diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp index ca65c446ea..fac58cc00f 100644 --- a/lib/Target/X86/InstSelectSimple.cpp +++ b/lib/Target/X86/InstSelectSimple.cpp @@ -883,11 +883,12 @@ static inline BasicBlock *getBlockAfter(BasicBlock *BB) { /// void ISel::visitBranchInst(BranchInst &BI) { BasicBlock *NextBB = getBlockAfter(BI.getParent()); // BB after current one - BuildMI(BB, X86::FP_REG_KILL, 0); if (!BI.isConditional()) { // Unconditional branch? - if (BI.getSuccessor(0) != NextBB) + if (BI.getSuccessor(0) != NextBB) { + BuildMI(BB, X86::FP_REG_KILL, 0); BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(0)); + } return; } @@ -898,6 +899,7 @@ void ISel::visitBranchInst(BranchInst &BI) { // computed some other way... unsigned condReg = getReg(BI.getCondition()); BuildMI(BB, X86::CMPri8, 2).addReg(condReg).addZImm(0); + BuildMI(BB, X86::FP_REG_KILL, 0); if (BI.getSuccessor(1) == NextBB) { if (BI.getSuccessor(0) != NextBB) BuildMI(BB, X86::JNE, 1).addPCDisp(BI.getSuccessor(0)); @@ -936,6 +938,7 @@ void ISel::visitBranchInst(BranchInst &BI) { X86::JS, X86::JNS }, }; + BuildMI(BB, X86::FP_REG_KILL, 0); if (BI.getSuccessor(0) != NextBB) { BuildMI(BB, OpcodeTab[isSigned][OpNum], 1).addPCDisp(BI.getSuccessor(0)); if (BI.getSuccessor(1) != NextBB) diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp index ca65c446ea..fac58cc00f 100644 --- a/lib/Target/X86/X86ISelSimple.cpp +++ b/lib/Target/X86/X86ISelSimple.cpp @@ -883,11 +883,12 @@ static inline BasicBlock *getBlockAfter(BasicBlock *BB) { /// void ISel::visitBranchInst(BranchInst &BI) { BasicBlock *NextBB = getBlockAfter(BI.getParent()); // BB after current one - BuildMI(BB, X86::FP_REG_KILL, 0); if (!BI.isConditional()) { // Unconditional branch? - if (BI.getSuccessor(0) != NextBB) + if (BI.getSuccessor(0) != NextBB) { + BuildMI(BB, X86::FP_REG_KILL, 0); BuildMI(BB, X86::JMP, 1).addPCDisp(BI.getSuccessor(0)); + } return; } @@ -898,6 +899,7 @@ void ISel::visitBranchInst(BranchInst &BI) { // computed some other way... unsigned condReg = getReg(BI.getCondition()); BuildMI(BB, X86::CMPri8, 2).addReg(condReg).addZImm(0); + BuildMI(BB, X86::FP_REG_KILL, 0); if (BI.getSuccessor(1) == NextBB) { if (BI.getSuccessor(0) != NextBB) BuildMI(BB, X86::JNE, 1).addPCDisp(BI.getSuccessor(0)); @@ -936,6 +938,7 @@ void ISel::visitBranchInst(BranchInst &BI) { X86::JS, X86::JNS }, }; + BuildMI(BB, X86::FP_REG_KILL, 0); if (BI.getSuccessor(0) != NextBB) { BuildMI(BB, OpcodeTab[isSigned][OpNum], 1).addPCDisp(BI.getSuccessor(0)); if (BI.getSuccessor(1) != NextBB) |