diff options
| -rw-r--r-- | lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 4 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCISelPattern.cpp | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index a3391f1cfb..8c1e6cbf8b 100644 --- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -896,7 +896,7 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) { unsigned Opc; switch (N->getValueType(0)) { - default: assert(0 && "Unknown type to ISD::SDIV"); break; + default: assert(0 && "Unknown type to ISD::SDIV"); case MVT::i32: Opc = PPC::DIVW; break; case MVT::f32: Opc = PPC::FDIVS; break; case MVT::f64: Opc = PPC::FDIV; break; @@ -1135,7 +1135,7 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) { SDOperand LHSH = Select(N->getOperand(1)); unsigned Imm; - bool ME, ZE; + bool ME = false, ZE = false; if (isIntImmediate(N->getOperand(3), Imm)) { ME = (signed)Imm == -1; ZE = Imm == 0; diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp index 102b4b3845..3187e4a349 100644 --- a/lib/Target/PowerPC/PPCISelPattern.cpp +++ b/lib/Target/PowerPC/PPCISelPattern.cpp @@ -1414,7 +1414,7 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) { Tmp2 = SelectExpr(N.getOperand(1)); if (N.getOpcode() == ISD::ADD_PARTS) { - bool ME, ZE; + bool ME = false, ZE = false; if (isIntImmediate(N.getOperand(3), Tmp3)) { ME = (signed)Tmp3 == -1; ZE = Tmp3 == 0; |