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| -rw-r--r-- | lib/Target/ARM/README.txt | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/ARM/README.txt b/lib/Target/ARM/README.txt index f0f4d51b89..940db16df6 100644 --- a/lib/Target/ARM/README.txt +++ b/lib/Target/ARM/README.txt @@ -463,3 +463,7 @@ More register scavenging work: resulting live interval is not assigned a physical register. It may be possible (with the help of the scavenger) to turn some spill / restore pairs into register copies. + +//===---------------------------------------------------------------------===// + +Teach LSR about ARM addressing modes. |