diff options
| -rw-r--r-- | test/CodeGen/X86/cmov-zext.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/combiner-aa-1.ll | 2 | ||||
| -rw-r--r-- | test/Transforms/MemCpyOpt/align.ll | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/test/CodeGen/X86/cmov-zext.ll b/test/CodeGen/X86/cmov-zext.ll index 8df228a00a..a6422c45c0 100644 --- a/test/CodeGen/X86/cmov-zext.ll +++ b/test/CodeGen/X86/cmov-zext.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llvm-as < %s | llc -march=x86-64 | FileCheck %s ; x86's 32-bit cmov doesn't clobber the high 32 bits of the destination ; if the condition is false. An explicit zero-extend (movl) is needed diff --git a/test/CodeGen/X86/combiner-aa-1.ll b/test/CodeGen/X86/combiner-aa-1.ll index 58a7129b60..c768f6000a 100644 --- a/test/CodeGen/X86/combiner-aa-1.ll +++ b/test/CodeGen/X86/combiner-aa-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s --combiner-alias-analysis --combiner-global-alias-analysis +; RUN: llvm-as < %s | llc --combiner-alias-analysis --combiner-global-alias-analysis ; PR4880 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" diff --git a/test/Transforms/MemCpyOpt/align.ll b/test/Transforms/MemCpyOpt/align.ll index a9d0337852..312ffad8aa 100644 --- a/test/Transforms/MemCpyOpt/align.ll +++ b/test/Transforms/MemCpyOpt/align.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -S -memcpyopt | FileCheck %s +; RUN: llvm-as < %s | opt -memcpyopt | llvm-dis | FileCheck %s ; The resulting memset is only 4-byte aligned, despite containing ; a 16-byte alignmed store in the middle. |