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-rw-r--r--include/llvm/CodeGen/CallingConvLower.h4
-rw-r--r--include/llvm/CodeGen/SelectionDAG.h7
-rw-r--r--include/llvm/CodeGen/SelectionDAGNodes.h50
-rw-r--r--include/llvm/Target/TargetLowering.h14
-rw-r--r--lib/CodeGen/SelectionDAG/CallingConvLower.cpp15
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAG.cpp39
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp11
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp61
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp6
-rw-r--r--lib/Target/ARM/ARMISelLowering.cpp24
-rw-r--r--lib/Target/CellSPU/SPUISelLowering.cpp23
-rw-r--r--lib/Target/Mips/MipsISelLowering.cpp20
-rw-r--r--lib/Target/Mips/MipsISelLowering.h2
-rw-r--r--lib/Target/PowerPC/PPCISelLowering.cpp63
-rw-r--r--lib/Target/PowerPC/PPCISelLowering.h2
-rw-r--r--lib/Target/Sparc/SparcISelLowering.cpp23
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp81
-rw-r--r--lib/Target/X86/X86ISelLowering.h12
18 files changed, 258 insertions, 199 deletions
diff --git a/include/llvm/CodeGen/CallingConvLower.h b/include/llvm/CodeGen/CallingConvLower.h
index 6773c494bd..2a57cc183d 100644
--- a/include/llvm/CodeGen/CallingConvLower.h
+++ b/include/llvm/CodeGen/CallingConvLower.h
@@ -143,7 +143,7 @@ public:
/// AnalyzeCallOperands - Analyze an ISD::CALL node, incorporating info
/// about the passed values into this state.
- void AnalyzeCallOperands(SDNode *TheCall, CCAssignFn Fn);
+ void AnalyzeCallOperands(CallSDNode *TheCall, CCAssignFn Fn);
/// AnalyzeCallOperands - Same as above except it takes vectors of types
/// and argument flags.
@@ -153,7 +153,7 @@ public:
/// AnalyzeCallResult - Analyze the return values of an ISD::CALL node,
/// incorporating info about the passed values into this state.
- void AnalyzeCallResult(SDNode *TheCall, CCAssignFn Fn);
+ void AnalyzeCallResult(CallSDNode *TheCall, CCAssignFn Fn);
/// AnalyzeCallResult - Same as above except it's specialized for calls which
/// produce a single value.
diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h
index 52c67c0c76..15d0edc3d8 100644
--- a/include/llvm/CodeGen/SelectionDAG.h
+++ b/include/llvm/CodeGen/SelectionDAG.h
@@ -463,6 +463,11 @@ public:
return getNode(ISD::MERGE_VALUES, VTs, Ops, NumOps);
}
+ /// getCall - Create a CALL node from the given information.
+ ///
+ SDValue getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall,
+ SDVTList VTs, const SDValue *Operands, unsigned NumOperands);
+
/// getLoad - Loads are not normal binary operators: their result type is not
/// determined by their operands, and they produce a value AND a token chain.
///
@@ -731,7 +736,7 @@ public:
SDValue getShuffleScalarElt(const SDNode *N, unsigned Idx);
private:
- void RemoveNodeFromCSEMaps(SDNode *N);
+ bool RemoveNodeFromCSEMaps(SDNode *N);
SDNode *AddNonLeafNodeToCSEMaps(SDNode *N);
SDNode *FindModifiedNodeSlot(SDNode *N, SDValue Op, void *&InsertPos);
SDNode *FindModifiedNodeSlot(SDNode *N, SDValue Op1, SDValue Op2,
diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h
index 7d6a1776aa..85c464965d 100644
--- a/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -179,7 +179,7 @@ namespace ISD {
///
FORMAL_ARGUMENTS,
- /// RV1, RV2...RVn, CHAIN = CALL(CHAIN, CC#, ISVARARG, ISTAILCALL, CALLEE,
+ /// RV1, RV2...RVn, CHAIN = CALL(CHAIN, CALLEE,
/// ARG0, FLAG0, ARG1, FLAG1, ... ARGn, FLAGn)
/// This node represents a fully general function call, before the legalizer
/// runs. This has one result value for each argument / flag pair, plus
@@ -194,6 +194,11 @@ namespace ISD {
/// Bit 10-26 - size of byval structures
/// Bits 31:27 - argument ABI alignment in the first argument piece and
/// alignment '1' in other argument pieces.
+ ///
+ /// CALL nodes use the CallSDNode subclass of SDNode, which
+ /// additionally carries information about the calling convention,
+ /// whether the call is varargs, and if it's marked as a tail call.
+ ///
CALL,
// EXTRACT_ELEMENT - This is used to get the lower or upper (determined by
@@ -2181,6 +2186,49 @@ public:
}
};
+/// CallSDNode - Node for calls -- ISD::CALL.
+class CallSDNode : public SDNode {
+ unsigned CallingConv;
+ bool IsVarArg;
+ bool IsTailCall;
+ virtual void ANCHOR(); // Out-of-line virtual method to give class a home.
+protected:
+ friend class SelectionDAG;
+ CallSDNode(unsigned cc, bool isvararg, bool istailcall,
+ SDVTList VTs, const SDValue *Operands, unsigned numOperands)
+ : SDNode(ISD::CALL, VTs, Operands, numOperands),
+ CallingConv(cc), IsVarArg(isvararg), IsTailCall(istailcall) {}
+public:
+ unsigned getCallingConv() const { return CallingConv; }
+ unsigned isVarArg() const { return IsVarArg; }
+ unsigned isTailCall() const { return IsTailCall; }
+
+ /// Set this call to not be marked as a tail call. Normally setter
+ /// methods in SDNodes are unsafe because it breaks the CSE map,
+ /// but we don't CSE calls so it's ok in this case.
+ void setNotTailCall() { IsTailCall = false; }
+
+ SDValue getChain() const { return getOperand(0); }
+ SDValue getCallee() const { return getOperand(1); }
+
+ unsigned getNumArgs() const { return (getNumOperands() - 2) / 2; }
+ SDValue getArg(unsigned i) const { return getOperand(2+2*i); }
+ SDValue getArgFlagsVal(unsigned i) const {
+ return getOperand(3+2*i);
+ }
+ ISD::ArgFlagsTy getArgFlags(unsigned i) const {
+ return cast<ARG_FLAGSSDNode>(getArgFlagsVal(i).getNode())->getArgFlags();
+ }
+
+ unsigned getNumRetVals() const { return getNumValues() - 1; }
+ MVT getRetValType(unsigned i) const { return getValueType(i); }
+
+ static bool classof(const CallSDNode *) { return true; }
+ static bool classof(const SDNode *N) {
+ return N->getOpcode() == ISD::CALL;
+ }
+};
+
/// VTSDNode - This class is used to represent MVT's, which are used
/// to parameterize some operations.
class VTSDNode : public SDNode {
diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h
index 85279bb581..af5641674c 100644
--- a/include/llvm/Target/TargetLowering.h
+++ b/include/llvm/Target/TargetLowering.h
@@ -1075,7 +1075,7 @@ public:
/// IsEligibleForTailCallOptimization - Check whether the call is eligible for
/// tail call optimization. Targets which want to do tail call optimization
/// should override this function.
- virtual bool IsEligibleForTailCallOptimization(SDValue Call,
+ virtual bool IsEligibleForTailCallOptimization(CallSDNode *Call,
SDValue Ret,
SelectionDAG &DAG) const {
return false;
@@ -1085,15 +1085,15 @@ public:
/// preceeds the RET node and whether the return uses the result of the node
/// or is a void return. This function can be used by the target to determine
/// eligiblity of tail call optimization.
- static bool CheckTailCallReturnConstraints(SDValue Call, SDValue Ret) {
+ static bool CheckTailCallReturnConstraints(CallSDNode *TheCall, SDValue Ret) {
unsigned NumOps = Ret.getNumOperands();
if ((NumOps == 1 &&
- (Ret.getOperand(0) == SDValue(Call.getNode(),1) ||
- Ret.getOperand(0) == SDValue(Call.getNode(),0))) ||
+ (Ret.getOperand(0) == SDValue(TheCall,1) ||
+ Ret.getOperand(0) == SDValue(TheCall,0))) ||
(NumOps > 1 &&
- Ret.getOperand(0) == SDValue(Call.getNode(),
- Call.getNode()->getNumValues()-1) &&
- Ret.getOperand(1) == SDValue(Call.getNode(),0)))
+ Ret.getOperand(0) == SDValue(TheCall,
+ TheCall->getNumValues()-1) &&
+ Ret.getOperand(1) == SDValue(TheCall,0)))
return true;
return false;
}
diff --git a/lib/CodeGen/SelectionDAG/CallingConvLower.cpp b/lib/CodeGen/SelectionDAG/CallingConvLower.cpp
index 5987e0cdd5..a6f52dd024 100644
--- a/lib/CodeGen/SelectionDAG/CallingConvLower.cpp
+++ b/lib/CodeGen/SelectionDAG/CallingConvLower.cpp
@@ -91,12 +91,11 @@ void CCState::AnalyzeReturn(SDNode *TheRet, CCAssignFn Fn) {
/// AnalyzeCallOperands - Analyze an ISD::CALL node, incorporating info
/// about the passed values into this state.
-void CCState::AnalyzeCallOperands(SDNode *TheCall, CCAssignFn Fn) {
- unsigned NumOps = (TheCall->getNumOperands() - 5) / 2;
+void CCState::AnalyzeCallOperands(CallSDNode *TheCall, CCAssignFn Fn) {
+ unsigned NumOps = TheCall->getNumArgs();
for (unsigned i = 0; i != NumOps; ++i) {
- MVT ArgVT = TheCall->getOperand(5+2*i).getValueType();
- ISD::ArgFlagsTy ArgFlags =
- cast<ARG_FLAGSSDNode>(TheCall->getOperand(5+2*i+1))->getArgFlags();
+ MVT ArgVT = TheCall->getArg(i).getValueType();
+ ISD::ArgFlagsTy ArgFlags = TheCall->getArgFlags(i);
if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
cerr << "Call operand #" << i << " has unhandled type "
<< ArgVT.getMVTString() << "\n";
@@ -124,9 +123,9 @@ void CCState::AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
/// AnalyzeCallResult - Analyze the return values of an ISD::CALL node,
/// incorporating info about the passed values into this state.
-void CCState::AnalyzeCallResult(SDNode *TheCall, CCAssignFn Fn) {
- for (unsigned i = 0, e = TheCall->getNumValues() - 1; i != e; ++i) {
- MVT VT = TheCall->getValueType(i);
+void CCState::AnalyzeCallResult(CallSDNode *TheCall, CCAssignFn Fn) {
+ for (unsigned i = 0, e = TheCall->getNumRetVals(); i != e; ++i) {
+ MVT VT = TheCall->getRetValType(i);
if (Fn(i, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), *this)) {
cerr << "Call result #" << i << " has unhandled type "
<< VT.getMVTString() << "\n";
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 6ebd514999..921d7b060b 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -595,13 +595,13 @@ void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
/// correspond to it. This is useful when we're about to delete or repurpose
/// the node. We don't want future request for structurally identical nodes
/// to return N anymore.
-void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
+bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
bool Erased = false;
switch (N->getOpcode()) {
case ISD::EntryToken:
assert(0 && "EntryToken should not be in CSEMaps!");
- return;
- case ISD::HANDLENODE: return; // noop.
+ return false;
+ case ISD::HANDLENODE: return false; // noop.
case ISD::CONDCODE:
assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
"Cond code doesn't exist!");
@@ -635,7 +635,8 @@ void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
// flag result (which cannot be CSE'd) or is one of the special cases that are
// not subject to CSE.
if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
- !N->isTargetOpcode() &&
+ !N->isMachineOpcode() &&
+ N->getOpcode() != ISD::CALL &&
N->getOpcode() != ISD::DBG_LABEL &&
N->getOpcode() != ISD::DBG_STOPPOINT &&
N->getOpcode() != ISD::EH_LABEL &&
@@ -645,6 +646,7 @@ void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
assert(0 && "Node is not in map!");
}
#endif
+ return Erased;
}
/// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It
@@ -660,6 +662,7 @@ SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) {
switch (N->getOpcode()) {
default: break;
+ case ISD::CALL:
case ISD::HANDLENODE:
case ISD::DBG_LABEL:
case ISD::DBG_STOPPOINT:
@@ -3304,6 +3307,21 @@ SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
}
SDValue
+SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall,
+ SDVTList VTs,
+ const SDValue *Operands, unsigned NumOperands) {
+ // Do not CSE calls. Note that in addition to being a compile-time
+ // optimization (since attempting CSE of calls is unlikely to be
+ // meaningful), we actually depend on this behavior. CallSDNode can
+ // be mutated, which is only safe if calls are not CSE'd.
+ SDNode *N = NodeAllocator.Allocate<CallSDNode>();
+ new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall,
+ VTs, Operands, NumOperands);
+ AllNodes.push_back(N);
+ return SDValue(N, 0);
+}
+
+SDValue
SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
MVT VT, SDValue Chain,
SDValue Ptr, SDValue Offset,
@@ -3761,7 +3779,8 @@ SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
// Nope it doesn't. Remove the node from its current place in the maps.
if (InsertPos)
- RemoveNodeFromCSEMaps(N);
+ if (!RemoveNodeFromCSEMaps(N))
+ InsertPos = 0;
// Now we update the operands.
N->OperandList[0].getVal()->removeUser(0, N);
@@ -3790,7 +3809,8 @@ UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
// Nope it doesn't. Remove the node from its current place in the maps.
if (InsertPos)
- RemoveNodeFromCSEMaps(N);
+ if (!RemoveNodeFromCSEMaps(N))
+ InsertPos = 0;
// Now we update the operands.
if (N->OperandList[0] != Op1) {
@@ -3856,7 +3876,8 @@ UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
// Nope it doesn't. Remove the node from its current place in the maps.
if (InsertPos)
- RemoveNodeFromCSEMaps(N);
+ if (!RemoveNodeFromCSEMaps(N))
+ InsertPos = 0;
// Now we update the operands.
for (unsigned i = 0; i != NumOps; ++i) {
@@ -4079,7 +4100,8 @@ SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
return ON;
}
- RemoveNodeFromCSEMaps(N);
+ if (!RemoveNodeFromCSEMaps(N))
+ IP = 0;
// Start the morphing.
N->NodeType = Opc;
@@ -4582,6 +4604,7 @@ void MemSDNode::ANCHOR() {}
void LoadSDNode::ANCHOR() {}
void StoreSDNode::ANCHOR() {}
void AtomicSDNode::ANCHOR() {}
+void CallSDNode::ANCHOR() {}
HandleSDNode::~HandleSDNode() {
DropOperands();
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
index a95a50bea7..599f0dd82c 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
@@ -5325,9 +5325,6 @@ TargetLowering::LowerCallTo(SDValue Chain, const Type *RetTy,
ArgListTy &Args, SelectionDAG &DAG) {
SmallVector<SDValue, 32> Ops;
Ops.push_back(Chain); // Op#0 - Chain
- Ops.push_back(DAG.getConstant(CallingConv, getPointerTy())); // Op#1 - CC
- Ops.push_back(DAG.getConstant(isVarArg, getPointerTy())); // Op#2 - VarArg
- Ops.push_back(DAG.getConstant(isTailCall, getPointerTy())); // Op#3 - Tail
Ops.push_back(Callee);
// Handle all of the outgoing arguments.
@@ -5412,10 +5409,10 @@ TargetLowering::LowerCallTo(SDValue Chain, const Type *RetTy,
LoweredRetTys.push_back(MVT::Other); // Always has a chain.
// Create the CALL node.
- SDValue Res = DAG.getNode(ISD::CALL,
- DAG.getVTList(&LoweredRetTys[0],
- LoweredRetTys.size()),
- &Ops[0], Ops.size());
+ SDValue Res = DAG.getCall(CallingConv, isVarArg, isTailCall,
+ DAG.getVTList(&LoweredRetTys[0],
+ LoweredRetTys.size()),
+ &Ops[0], Ops.size());
Chain = Res.getValue(LoweredRetTys.size() - 1);
// Gather up the call result into a single value.
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 3159db4c21..fa175109e9 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -402,56 +402,45 @@ static void CheckDAGForTailCallsAndFixThem(SelectionDAG &DAG,
for (SelectionDAG::allnodes_iterator BE = DAG.allnodes_begin(),
BI = DAG.allnodes_end(); BI != BE; ) {
--BI;
- if (BI->getOpcode() == ISD::CALL) {
+ if (CallSDNode *TheCall = dyn_cast<CallSDNode>(BI)) {
SDValue OpRet(Ret, 0);
SDValue OpCall(BI, 0);
- bool isMarkedTailCall =
- cast<ConstantSDNode>(OpCall.getOperand(3))->getZExtValue() != 0;
+ bool isMarkedTailCall = TheCall->isTailCall();
// If CALL node has tail call attribute set to true and the call is not
// eligible (no RET or the target rejects) the attribute is fixed to
// false. The TargetLowering::IsEligibleForTailCallOptimization function
// must correctly identify tail call optimizable calls.
if (!isMarkedTailCall) continue;
if (Ret==NULL ||
- !TLI.IsEligibleForTailCallOptimization(OpCall, OpRet, DAG)) {
- // Not eligible. Mark CALL node as non tail call.
- SmallVector<SDValue, 32> Ops;
- unsigned idx=0;
- for(SDNode::op_iterator I =OpCall.getNode()->op_begin(),
- E = OpCall.getNode()->op_end(); I != E; I++, idx++) {
- if (idx!=3)
- Ops.push_back(*I);
- else
- Ops.push_back(DAG.getConstant(false, TLI.getPointerTy()));
- }
- DAG.UpdateNodeOperands(OpCall, Ops.begin(), Ops.size());
+ !TLI.IsEligibleForTailCallOptimization(TheCall, OpRet, DAG)) {
+ // Not eligible. Mark CALL node as non tail call. Note that we
+ // can modify the call node in place since calls are not CSE'd.
+ TheCall->setNotTailCall();
} else {
// Look for tail call clobbered arguments. Emit a series of
// copyto/copyfrom virtual register nodes to protect them.
SmallVector<SDValue, 32> Ops;
- SDValue Chain = OpCall.getOperand(0), InFlag;
- unsigned idx=0;
- for(SDNode::op_iterator I = OpCall.getNode()->op_begin(),
- E = OpCall.getNode()->op_end(); I != E; I++, idx++) {
- SDValue Arg = *I;
- if (idx > 4 && (idx % 2)) {
- bool isByVal = cast<ARG_FLAGSSDNode>(OpCall.getOperand(idx+1))->
- getArgFlags().isByVal();
- MachineFunction &MF = DAG.getMachineFunction();
- MachineFrameInfo *MFI = MF.getFrameInfo();
- if (!isByVal &&
- IsPossiblyOverwrittenArgumentOfTailCall(Arg, MFI)) {
- MVT VT = Arg.getValueType();
- unsigned VReg = MF.getRegInfo().
- createVirtualRegister(TLI.getRegClassFor(VT));
- Chain = DAG.getCopyToReg(Chain, VReg, Arg, InFlag);
- InFlag = Chain.getValue(1);
- Arg = DAG.getCopyFromReg(Chain, VReg, VT, InFlag);
- Chain = Arg.getValue(1);
- InFlag = Arg.getValue(2);
- }
+ SDValue Chain = TheCall->getChain(), InFlag;
+ Ops.push_back(Chain);
+ Ops.push_back(TheCall->getCallee());
+ for (unsigned i = 0, e = TheCall->getNumArgs(); i != e; ++i) {
+ SDValue Arg = TheCall->getArg(i);
+ bool isByVal = TheCall->getArgFlags(i).isByVal();
+ MachineFunction &MF = DAG.getMachineFunction();
+ MachineFrameInfo *MFI = MF.getFrameInfo();
+ if (!isByVal &&
+ IsPossiblyOverwrittenArgumentOfTailCall(Arg, MFI)) {
+ MVT VT = Arg.getValueType();
+ unsigned VReg = MF.getRegInfo().
+ createVirtualRegister(TLI.getRegClassFor(VT));
+ Chain = DAG.getCopyToReg(Chain, VReg, Arg, InFlag);
+ InFlag = Chain.getValue(1);
+ Arg = DAG.getCopyFromReg(Chain, VReg, VT, InFlag);
+ Chain = Arg.getValue(1);
+ InFlag = Arg.getValue(2);
}
Ops.push_back(Arg);
+ Ops.push_back(TheCall->getArgFlagsVal(i));
}
// Link in chain of CopyTo/CopyFromReg.
Ops[0] = Chain;
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
index f2cd3c1b7a..570caa9701 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
@@ -179,6 +179,12 @@ std::string DOTGraphTraits<SelectionDAG*>::getNodeLabel(const SDNode *Node,
Op += ":" + utostr(D->getColumn());
} else if (const LabelSDNode *L = dyn_cast<LabelSDNode>(Node)) {
Op += ": LabelID=" + utostr(L->getLabelID());
+ } else if (const CallSDNode *C = dyn_cast<CallSDNode>(Node)) {
+ Op += ": CallingConv=" + utostr(C->getCallingConv());
+ if (C->isVarArg())
+ Op += ", isVarArg";
+ if (C->isTailCall())
+ Op += ", isTailCall";
} else if (const ExternalSymbolSDNode *ES =
dyn_cast<ExternalSymbolSDNode>(Node)) {
Op += "'" + std::string(ES->getSymbol()) + "'";
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index cb0fa8e872..2202177e18 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -410,13 +410,14 @@ HowToPassArgument(MVT ObjectVT, unsigned NumGPRs,
/// ARMISD:CALL <- callseq_end chain. Also add input and output parameter
/// nodes.
SDValue ARMTargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) {
- MVT RetVT= Op.getNode()->getValueType(0);
- SDValue Chain = Op.getOperand(0);
- unsigned CallConv = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
+ CallSDNode *TheCall = cast<CallSDNode>(Op.getNode());
+ MVT RetVT = TheCall->getRetValType(0);
+ SDValue Chain = TheCall->getChain();
+ unsigned CallConv = TheCall->getCallingConv();
assert((CallConv == CallingConv::C ||
CallConv == CallingConv::Fast) && "unknown calling convention");
- SDValue Callee = Op.getOperand(4);
- unsigned NumOps = (Op.getNumOperands() - 5) / 2;
+ SDValue Callee = TheCall->getCallee();
+ unsigned NumOps = TheCall->getNumArgs();
unsigned ArgOffset = 0; // Frame mechanisms handle retaddr slot
unsigned NumGPRs = 0; // GPRs used for parameter passing.
@@ -429,9 +430,8 @@ SDValue ARMTargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) {
unsigned ObjGPRs;
unsigned StackPad;
unsigned GPRPad;
- MVT ObjectVT = Op.getOperand(5+2*i).getValueType();
- ISD::ArgFlagsTy Flags =
- cast<ARG_FLAGSSDNode>(Op.getOperand(5+2*i+1))->getArgFlags();
+ MVT ObjectVT = TheCall->getArg(i).getValueType();
+ ISD::ArgFlagsTy Flags = TheCall->getArgFlags(i);
HowToPassArgument(ObjectVT, NumGPRs, NumBytes, ObjGPRs, ObjSize,
GPRPad, StackPad, Flags);
NumBytes += ObjSize + StackPad;
@@ -453,9 +453,8 @@ SDValue ARMTargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) {
std::vector<std::pair<unsigned, SDValue> > RegsToPass;
std::vector<SDValue> MemOpChains;
for (unsigned i = 0; i != NumOps; ++i) {
- SDValue Arg = Op.getOperand(5+2*i);
- ISD::ArgFlagsTy Flags =
- cast<ARG_FLAGSSDNode>(Op.getOperand(5+2*i+1))->getArgFlags();
+ SDValue Arg = TheCall->getArg(i);
+ ISD::ArgFlagsTy Flags = TheCall->getArgFlags(i);
MVT ArgVT = Arg.getValueType();
unsigned ObjSize;
@@ -631,7 +630,8 @@ SDValue ARMTargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) {
case MVT::i32:
Chain = DAG.getCopyFromReg(Chain, ARM::R0, MVT::i32, InFlag).getValue(1);
ResultVals.push_back(Chain.getValue(0));
- if (Op.getNode()->getValueType(1) == MVT::i32) {
+ if (TheCall->getNumRetVals() > 1 &&
+ TheCall->getRetValType(1) == MVT::i32) {
// Returns a i64 value.
Chain = DAG.getCopyFromReg(Chain, ARM::R1, MVT::i32,
Chain.getValue(2)).getValue(1);
diff --git a/lib/Target/CellSPU/SPUISelLowering.cpp b/lib/Target/CellSPU/SPUISelLowering.cpp
index eec428bbab..384755d665 100644
--- a/lib/Target/CellSPU/SPUISelLowering.cpp
+++ b/lib/Target/CellSPU/SPUISelLowering.cpp
@@ -1101,13 +1101,14 @@ static SDNode *isLSAAddress(SDValue Op, SelectionDAG &DAG) {
static
SDValue
LowerCALL(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
- SDValue Chain = Op.getOperand(0);
+ CallSDNode *TheCall = cast<CallSDNode>(Op.getNode());
+ SDValue Chain = TheCall->getChain();
#if 0
- bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue() != 0;
- bool isTailCall = cast<ConstantSDNode>(Op.getOperand(3))->getZExtValue() != 0;
+ bool isVarArg = TheCall->isVarArg();
+ bool isTailCall = TheCall->isTailCall();
#endif
- SDValue Callee = Op.getOperand(4);
- unsigned NumOps = (Op.getNumOperands() - 5) / 2;
+ SDValue Callee = TheCall->getCallee();
+ unsigned NumOps = TheCall->getNumArgs();
unsigned StackSlotSize = SPUFrameInfo::stackSlotSize();
const unsigned *ArgRegs = SPURegisterInfo::getArgRegs();
const unsigned NumArgRegs = SPURegisterInfo::getNumArgRegs();
@@ -1136,7 +1137,7 @@ LowerCALL(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
SmallVector<SDValue, 8> MemOpChains;
for (unsigned i = 0; i != NumOps; ++i) {
- SDValue Arg = Op.getOperand(5+2*i);
+ SDValue Arg = TheCall->getArg(i);
// PtrOff will be used to store the current argument to the stack if a
// register cannot be found for it.
@@ -1256,18 +1257,18 @@ LowerCALL(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
DAG.getConstant(NumStackBytes, PtrVT),
DAG.getConstant(0, PtrVT),
InFlag);
- if (Op.getNode()->getValueType(0) != MVT::Other)
+ if (TheCall->getValueType(0) != MVT::Other)
InFlag = Chain.getValue(1);
SDValue ResultVals[3];
unsigned NumResults = 0;
// If the call has results, copy the values out of the ret val registers.
- switch (Op.getNode()->getValueType(0).getSimpleVT()) {
+ switch (TheCall->getValueType(0).getSimpleVT()) {
default: assert(0 && "Unexpected ret value!");
case MVT::Other: break;
case MVT::i32:
- if (Op.getNode()->getValueType(1) == MVT::i32) {
+ if (TheCall->getValueType(1) == MVT::i32) {
Chain = DAG.getCopyFromReg(Chain, SPU::R4, MVT::i32, InFlag).getValue(1);
ResultVals[0] = Chain.getValue(0);
Chain = DAG.getCopyFromReg(Chain, SPU::R3, MVT::i32,
@@ -1287,7 +1288,7 @@ LowerCALL(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
break;
case MVT::f32:
case MVT::f64:
- Chain = DAG.getCopyFromReg(Chain, SPU::R3, Op.getNode()->getValueType(0),
+ Chain = DAG.getCopyFromReg(Chain, SPU::R3, TheCall->getValueType(0),
InFlag).getValue(1);
ResultVals[0] = Chain.getValue(0);
NumResults = 1;
@@ -1297,7 +1298,7 @@ LowerCALL(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
case MVT::v4i32:
case MVT::v8i16:
case MVT::v16i8:
- Chain = DAG.getCopyFromReg(Chain, SPU::R3, Op.getNode()->getValueType(0),
+ Chain = DAG.getCopyFromReg(Chain, SPU::R3, TheCall->getValueType(0),
InFlag).getValue(1);
ResultVals[0] = Chain.getValue(0);
NumResults = 1;
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index 1f77b13021..557a1050c6 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -585,10 +585,11 @@ LowerCALL(SDValue Op, SelectionDAG &DAG)
{
MachineFunction &MF = DAG.getMachineFunction();
- SDValue Chain = Op.getOperand(0);
- SDValue Callee = Op.getOperand(4);
- bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue() != 0;
- unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv();
+ CallSDNode *TheCall = cast<CallSDNode>(Op.getNode());
+ SDValue Chain = TheCall->getChain();
+ SDValue Callee = TheCall->getCallee();
+ bool isVarArg = TheCall->isVarArg();
+ unsigned CC = TheCall->getCallingConv();
MachineFrameInfo *MFI = MF.getFrameInfo();
@@ -603,7 +604,7 @@ LowerCALL(SDValue Op, SelectionDAG &DAG)
MFI->CreateFixedObject(VTsize, (VTsize*3));
}
- CCInfo.AnalyzeCallOperands(Op.getNode(), CC_Mips);
+ CCInfo.AnalyzeCallOperands(TheCall, CC_Mips);
// Get a count of how many bytes are to be pushed on the stack.
unsigned NumBytes = CCInfo.getNextStackOffset();
@@ -624,7 +625,7 @@ LowerCALL(SDValue Op, SelectionDAG &DAG)
CCValAssign &VA = ArgLocs[i];
// Arguments start after the 5 first operands of ISD::CALL
- SDValue Arg = Op.getOperand(5+2*VA.getValNo());
+ SDValue Arg = TheCall->getArg(i);
// Promote the value if needed.
switch (VA.getLocInfo()) {
@@ -751,7 +752,7 @@ LowerCALL(SDValue Op, SelectionDAG &DAG)
// Handle result values, copying them out of physregs into vregs that we
// return.
- return SDValue(LowerCallResult(Chain, InFlag, Op.getNode(), CC, DAG), Op.getResNo());
+ return SDValue(LowerCallResult(Chain, InFlag, TheCall, CC, DAG), Op.getResNo());
}
/// LowerCallResult - Lower the result values of an ISD::CALL into the
@@ -760,11 +761,10 @@ LowerCALL(SDValue Op, SelectionDAG &DAG)
/// being lowered. Returns a SDNode with the same number of values as the
/// ISD::CALL.
SDNode *MipsTargetLowering::
-LowerCallResult(SDValue Chain, SDValue InFlag, SDNode *TheCall,
+LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall,
unsigned CallingConv, SelectionDAG &DAG) {
- bool isVarArg =
- cast<ConstantSDNode>(TheCall->getOperand(2))->getZExtValue() != 0;
+ bool isVarArg = TheCall->isVarArg();
// Assign locations to each value returned by this call.
SmallVector<CCValAssign, 16> RVLocs;
diff --git a/lib/Target/Mips/MipsISelLowering.h b/lib/Target/Mips/MipsISelLowering.h
index 9d8a756e76..fd595c9464 100644
--- a/lib/Target/Mips/MipsISelLowering.h
+++ b/lib/Target/Mips/MipsISelLowering.h
@@ -86,7 +86,7 @@ namespace llvm {
const MipsSubtarget *Subtarget;
// Lower Operand helpers
- SDNode *LowerCallResult(SDValue Chain, SDValue InFlag, SDNode*TheCall,
+ SDNode *LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall,
unsigned CallingConv, SelectionDAG &DAG);
bool IsGlobalInSmallSection(GlobalValue *GV);
bool IsInSmallSection(unsigned Size);
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index edac162427..1a891d93f5 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -1328,10 +1328,9 @@ static const unsigned *GetFPR(const PPCSubtarget &Subtarget) {
/// CalculateStackSlotSize - Calculates the size reserved for this argument on
/// the stack.
-static unsigned CalculateStackSlotSize(SDValue Arg, SDValue Flag,
+static unsigned CalculateStackSlotSize(SDValue Arg, ISD::ArgFlagsTy Flags,
bool isVarArg, unsigned PtrByteSize) {
MVT ArgVT = Arg.getValueType();
- ISD::ArgFlagsTy Flags = cast<ARG_FLAGSSDNode>(Flag)->getArgFlags();
unsigned ArgSize =ArgVT.getSizeInBits()/8;
if (Flags.isByVal())
ArgSize = Flags.getByValSize();
@@ -1475,14 +1474,14 @@ PPCTargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op,
if (isVarArg || isPPC64) {
MinReservedArea = ((MinReservedArea+15)/16)*16;
MinReservedArea += CalculateStackSlotSize(Op.getValue(ArgNo),
- Op.getOperand(ArgNo+3),
+ Flags,
isVarArg,
PtrByteSize);
} else nAltivecParamsAtEnd++;
} else
// Calculate min reserved area.
MinReservedArea += CalculateStackSlotSize(Op.getValue(ArgNo),
- Op.getOperand(ArgNo+3),
+ Flags,
isVarArg,
PtrByteSize);
@@ -1794,13 +1793,13 @@ CalculateParameterAndLinkageAreaSize(SelectionDAG &DAG,
bool isMachoABI,
bool isVarArg,
unsigned CC,
- SDValue Call,
+ CallSDNode *TheCall,