diff options
| -rw-r--r-- | lib/Target/IA64/IA64Bundling.cpp | 7 | ||||
| -rw-r--r-- | lib/Target/IA64/IA64InstrInfo.td | 7 | ||||
| -rw-r--r-- | lib/Target/IA64/IA64RegisterInfo.cpp | 8 |
3 files changed, 13 insertions, 9 deletions
diff --git a/lib/Target/IA64/IA64Bundling.cpp b/lib/Target/IA64/IA64Bundling.cpp index 0180ae23a4..2f3d238f08 100644 --- a/lib/Target/IA64/IA64Bundling.cpp +++ b/lib/Target/IA64/IA64Bundling.cpp @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. +// This file was developed by Duraid Madina and is distributed under the +// University of Illinois Open Source License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // @@ -56,7 +56,8 @@ namespace { std::set<unsigned> PendingRegWrites; // XXX: ugly global, but // pending writes can cross basic blocks. Note that - // taken branches end instruction groups. + // taken branches end instruction groups. So we + // only need to worry about 'fallthrough' code }; } // end of anonymous namespace diff --git a/lib/Target/IA64/IA64InstrInfo.td b/lib/Target/IA64/IA64InstrInfo.td index daf93f29fc..67d71e48db 100644 --- a/lib/Target/IA64/IA64InstrInfo.td +++ b/lib/Target/IA64/IA64InstrInfo.td @@ -501,10 +501,13 @@ def SHRUI : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm), def SHRSI : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm), "shr $dst = $src1, $imm">; -def EXTRU : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2), +def EXTRU : AForm<0x03, 0x0b, + (ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2), "extr.u $dst = $src1, $imm1, $imm2">; -def DEPZ : AForm<0x03, 0x0b, (ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2), "dep.z $dst = $src1, $imm1, $imm2">; +def DEPZ : AForm<0x03, 0x0b, + (ops GR:$dst, GR:$src1, u6imm:$imm1, u6imm:$imm2), + "dep.z $dst = $src1, $imm1, $imm2">; def PCMPEQOR : AForm<0x03, 0x0b, (ops PR:$dst, GR:$src1, GR:$src2, PR:$qp), "($qp) cmp.eq.or $dst, p0 = $src1, $src2">; diff --git a/lib/Target/IA64/IA64RegisterInfo.cpp b/lib/Target/IA64/IA64RegisterInfo.cpp index cddface9d9..d612efc29d 100644 --- a/lib/Target/IA64/IA64RegisterInfo.cpp +++ b/lib/Target/IA64/IA64RegisterInfo.cpp @@ -168,8 +168,8 @@ void IA64RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const if ( Offset <= 8191 && Offset >= -8192) { // smallish offset //fix up the old: MI.SetMachineOperandReg(i, IA64::r22); - MachineOperand &MO = MI.getOperand(i); - MO.setUse(); // mark r22 as being used (the bundler wants to know this) + MI.getOperand(i).setUse(); // mark r22 as being used + // (the bundler wants to know this) //insert the new MachineInstr* nMI=BuildMI(IA64::ADDIMM22, 2, IA64::r22) .addReg(BaseRegister).addSImm(Offset); @@ -177,8 +177,8 @@ void IA64RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const } else { // it's big //fix up the old: MI.SetMachineOperandReg(i, IA64::r22); - MachineOperand &MO = MI.getOperand(i); - MO.setUse(); // mark r22 as being used (the bundler wants to know this) + MI.getOperand(i).setUse(); // mark r22 as being used + // (the bundler wants to know this) MachineInstr* nMI; nMI=BuildMI(IA64::MOVLIMM64, 1, IA64::r22).addSImm(Offset); MBB.insert(II, nMI); |