diff options
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrAltivec.td | 7 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrFormats.td | 27 |
2 files changed, 34 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCInstrAltivec.td b/lib/Target/PowerPC/PPCInstrAltivec.td index 526523f0cc..0569e47b2f 100644 --- a/lib/Target/PowerPC/PPCInstrAltivec.td +++ b/lib/Target/PowerPC/PPCInstrAltivec.td @@ -93,6 +93,13 @@ class VX2_Int<bits<11> xo, string opc, Intrinsic IntID> def IMPLICIT_DEF_VRRC : Pseudo<(ops VRRC:$rD), "; $rD = IMPLICIT_DEF_VRRC", [(set VRRC:$rD, (v4f32 (undef)))]>; +def MFVSCR : VXForm_4<1540, (ops VRRC:$vD), + "mfvcr $vD", LdStGeneral, + [(set VRRC:$vD, (int_ppc_altivec_mfvscr))]>; +def MTVSCR : VXForm_5<1604, (ops VRRC:$vB), + "mtvcr $vB", LdStGeneral, + [(int_ppc_altivec_mtvscr VRRC:$vB)]>; + let isLoad = 1, PPC970_Unit = 2 in { // Loads. def LVEBX: XForm_1<31, 7, (ops VRRC:$vD, memrr:$src), "lvebx $vD, $src", LdStGeneral, diff --git a/lib/Target/PowerPC/PPCInstrFormats.td b/lib/Target/PowerPC/PPCInstrFormats.td index 805e1258c5..c3a78e65bf 100644 --- a/lib/Target/PowerPC/PPCInstrFormats.td +++ b/lib/Target/PowerPC/PPCInstrFormats.td @@ -697,6 +697,33 @@ class VXForm_3<bits<11> xo, dag OL, string asmstr, let Inst{21-31} = xo; } +/// VXForm_4 - VX instructions with "VD,0,0" register fields, like mfvscr. +class VXForm_4<bits<11> xo, dag OL, string asmstr, + InstrItinClass itin, list<dag> pattern> + : I<4, OL, asmstr, itin> { + bits<5> VD; + + let Pattern = pattern; + + let Inst{6-10} = VD; + let Inst{11-15} = 0; + let Inst{16-20} = 0; + let Inst{21-31} = xo; +} + +/// VXForm_5 - VX instructions with "0,0,VB" register fields, like mtvscr. +class VXForm_5<bits<11> xo, dag OL, string asmstr, + InstrItinClass itin, list<dag> pattern> + : I<4, OL, asmstr, itin> { + bits<5> VB; + + let Pattern = pattern; + + let Inst{6-10} = 0; + let Inst{11-15} = 0; + let Inst{16-20} = VB; + let Inst{21-31} = xo; +} // E-4 VXR-Form class VXRForm_1<bits<10> xo, dag OL, string asmstr, |