diff options
| -rw-r--r-- | lib/Target/Alpha/AlphaRegisterInfo.cpp | 27 | ||||
| -rw-r--r-- | lib/Target/Alpha/AlphaRegisterInfo.td | 4 |
2 files changed, 19 insertions, 12 deletions
diff --git a/lib/Target/Alpha/AlphaRegisterInfo.cpp b/lib/Target/Alpha/AlphaRegisterInfo.cpp index 0c5ca35202..e2cb4b0ad5 100644 --- a/lib/Target/Alpha/AlphaRegisterInfo.cpp +++ b/lib/Target/Alpha/AlphaRegisterInfo.cpp @@ -208,7 +208,7 @@ void AlphaRegisterInfo::emitPrologue(MachineFunction &MF) const { if (NumBytes <= 32767) { MI=BuildMI(Alpha::LDA, 2, Alpha::R30).addImm(-NumBytes).addReg(Alpha::R30); MBB.insert(MBBI, MI); - } else if (NumBytes <= 32767 * 65536) { + } else if ((unsigned long)NumBytes <= (unsigned long)32767 * (unsigned long)65536) { long y = NumBytes / 65536; if (NumBytes % 65536 > 32767) ++y; @@ -217,7 +217,7 @@ void AlphaRegisterInfo::emitPrologue(MachineFunction &MF) const { MI=BuildMI(Alpha::LDA, 2, Alpha::R30).addImm(-(NumBytes - y * 65536)).addReg(Alpha::R30); MBB.insert(MBBI, MI); } else { - std::cerr << "Too big a stack frame\n"; + std::cerr << "Too big a stack frame at " << NumBytes << "\n"; abort(); } } @@ -235,14 +235,21 @@ void AlphaRegisterInfo::emitEpilogue(MachineFunction &MF, if (NumBytes != 0) { - if (NumBytes <= 32000) //FIXME: do this better - { - MI=BuildMI(Alpha::LDA, 2, Alpha::R30).addImm(NumBytes).addReg(Alpha::R30); - MBB.insert(MBBI, MI); - } else { - std::cerr << "Too big a stack frame\n"; - abort(); - } + if (NumBytes <= 32767) { + MI=BuildMI(Alpha::LDA, 2, Alpha::R30).addImm(NumBytes).addReg(Alpha::R30); + MBB.insert(MBBI, MI); + } else if ((unsigned long)NumBytes <= (unsigned long)32767 * (unsigned long)65536) { + long y = NumBytes / 65536; + if (NumBytes % 65536 > 32767) + ++y; + MI=BuildMI(Alpha::LDAH, 2, Alpha::R30).addImm(y).addReg(Alpha::R30); + MBB.insert(MBBI, MI); + MI=BuildMI(Alpha::LDA, 2, Alpha::R30).addImm(NumBytes - y * 65536).addReg(Alpha::R30); + MBB.insert(MBBI, MI); + } else { + std::cerr << "Too big a stack frame at " << NumBytes << "\n"; + abort(); + } } } diff --git a/lib/Target/Alpha/AlphaRegisterInfo.td b/lib/Target/Alpha/AlphaRegisterInfo.td index 80f264bf88..51a9b5aa6d 100644 --- a/lib/Target/Alpha/AlphaRegisterInfo.td +++ b/lib/Target/Alpha/AlphaRegisterInfo.td @@ -81,13 +81,13 @@ def GPRC : RegisterClass<i64, 64, //Volitle [R0, R1, R2, R3, R4, R5, R6, R7, R8, R16, R17, R18, R19, R20, R21, R22, R23, R24, R25, R27, //Non-Volitile - R9, R10, R11, R12, R13, R14, R15, R26, /*R28,*/ R29, R30, R31]>; + R9, R10, R11, R12, R13, R14, R15, R26, /*R28,*/ R29, R30 /*, R31*/ ]>; //R28 is reserved for the assembler //Don't allocate 15, 29, 30, 31 //Allocation volatiles only for now def FPRC : RegisterClass<f64, 64, [F0, F1, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11, F12, F13, F14, F15, F16, F17, F18, F19, - F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, F30, F31]>; + F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, F30]>; |