diff options
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrFormats.td | 4 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 16 |
2 files changed, 10 insertions, 10 deletions
diff --git a/lib/Target/PowerPC/PPCInstrFormats.td b/lib/Target/PowerPC/PPCInstrFormats.td index 0f709e1968..1475f7ad03 100644 --- a/lib/Target/PowerPC/PPCInstrFormats.td +++ b/lib/Target/PowerPC/PPCInstrFormats.td @@ -449,8 +449,8 @@ class XOForm_1<bits<6> opcode, bits<9> xo, bit oe, dag OL, string asmstr, } class XOForm_3<bits<6> opcode, bits<9> xo, bit oe, - dag OL, string asmstr> - : XOForm_1<opcode, xo, oe, OL, asmstr, []> { + dag OL, string asmstr, list<dag> pattern> + : XOForm_1<opcode, xo, oe, OL, asmstr, pattern> { let RB = 0; } diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 30167698fb..1ffca1d377 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -60,10 +60,6 @@ def vtFP : PatLeaf<(vt), [{ return MVT::isFloatingPoint(N->getVT()); }]>; def not : PatFrag<(ops node:$in), (xor node:$in, immAllOnes)>; def ineg : PatFrag<(ops node:$in), (sub immZero, node:$in)>; - - - - class isPPC64 { bit PPC64 = 1; } class isVMX { bit VMX = 1; } class isDOT { @@ -476,13 +472,17 @@ def SUBFE : XOForm_1<31, 136, 0, (ops GPRC:$rT, GPRC:$rA, GPRC:$rB), "subfe $rT, $rA, $rB", []>; def ADDME : XOForm_3<31, 234, 0, (ops GPRC:$rT, GPRC:$rA), - "addme $rT, $rA">; + "addme $rT, $rA", + []>; def ADDZE : XOForm_3<31, 202, 0, (ops GPRC:$rT, GPRC:$rA), - "addze $rT, $rA">; + "addze $rT, $rA", + []>; def NEG : XOForm_3<31, 104, 0, (ops GPRC:$rT, GPRC:$rA), - "neg $rT, $rA">; + "neg $rT, $rA", + [(set GPRC:$rT, (ineg GPRC:$rA))]>; def SUBFZE : XOForm_3<31, 200, 0, (ops GPRC:$rT, GPRC:$rA), - "subfze $rT, $rA">; + "subfze $rT, $rA", + []>; // A-Form instructions. Most of the instructions executed in the FPU are of // this type. |