diff options
| -rw-r--r-- | lib/Target/X86/X86RegisterInfo.td | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/lib/Target/X86/X86RegisterInfo.td b/lib/Target/X86/X86RegisterInfo.td index aac496de0c..8e62f90f02 100644 --- a/lib/Target/X86/X86RegisterInfo.td +++ b/lib/Target/X86/X86RegisterInfo.td @@ -48,11 +48,6 @@ let Namespace = "X86" in { def ST6 : NamedReg<"ST(6)">; def ST7 : NamedReg<"ST(7)">; // Flags, Segment registers, etc... - - // This is a slimy hack to make it possible to say that flags are clobbered... - // Ideally we'd model instructions based on which particular flag(s) they - // could clobber. - //def EFLAGS : Register; } //===----------------------------------------------------------------------===// |