diff options
| -rw-r--r-- | include/llvm/CodeGen/InstrScheduling.h | 4 | ||||
| -rw-r--r-- | include/llvm/CodeGen/InstrSelection.h | 4 | ||||
| -rw-r--r-- | include/llvm/CodeGen/PeepholeOpts.h | 4 | ||||
| -rw-r--r-- | include/llvm/CodeGen/RegisterAllocation.h | 4 | ||||
| -rw-r--r-- | include/llvm/Transforms/Scalar.h | 4 | ||||
| -rw-r--r-- | lib/CodeGen/InstrSched/InstrScheduling.cpp | 2 | ||||
| -rw-r--r-- | lib/CodeGen/RegAlloc/PhyRegAlloc.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/SparcV9/InstrSched/InstrScheduling.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp | 2 | ||||
| -rw-r--r-- | lib/Transforms/Scalar/DecomposeMultiDimRefs.cpp | 2 | ||||
| -rw-r--r-- | lib/Transforms/Utils/LowerAllocations.cpp | 2 |
12 files changed, 17 insertions, 17 deletions
diff --git a/include/llvm/CodeGen/InstrScheduling.h b/include/llvm/CodeGen/InstrScheduling.h index e01dfe70c9..1e9c0dcf50 100644 --- a/include/llvm/CodeGen/InstrScheduling.h +++ b/include/llvm/CodeGen/InstrScheduling.h @@ -8,7 +8,7 @@ #ifndef LLVM_CODEGEN_INSTR_SCHEDULING_H #define LLVM_CODEGEN_INSTR_SCHEDULING_H -class Pass; +class FunctionPass; class TargetMachine; //--------------------------------------------------------------------------- @@ -21,6 +21,6 @@ class TargetMachine; // are still in SSA form. //--------------------------------------------------------------------------- -Pass *createInstructionSchedulingWithSSAPass(const TargetMachine &Target); +FunctionPass *createInstructionSchedulingWithSSAPass(const TargetMachine &Target); #endif diff --git a/include/llvm/CodeGen/InstrSelection.h b/include/llvm/CodeGen/InstrSelection.h index 03999db3d0..03e9af4167 100644 --- a/include/llvm/CodeGen/InstrSelection.h +++ b/include/llvm/CodeGen/InstrSelection.h @@ -15,7 +15,7 @@ class MachineInstr; class InstructionNode; class TargetMachine; class MachineCodeForInstruction; -class Pass; +class FunctionPass; //===--------------------- Required Functions --------------------------------- // Target-dependent functions that MUST be implemented for each target. @@ -43,7 +43,7 @@ extern bool ThisIsAChainRule (int eruleno); // Return a pass that performs machine dependant instruction selection. //--------------------------------------------------------------------------- -Pass *createInstructionSelectionPass(TargetMachine &Target); +FunctionPass *createInstructionSelectionPass(TargetMachine &Target); //************************ Exported Data Types *****************************/ diff --git a/include/llvm/CodeGen/PeepholeOpts.h b/include/llvm/CodeGen/PeepholeOpts.h index fc3254dc67..2cbc7782f5 100644 --- a/include/llvm/CodeGen/PeepholeOpts.h +++ b/include/llvm/CodeGen/PeepholeOpts.h @@ -8,8 +8,8 @@ #define LLVM_CODEGEN_PEEPHOLE_OPTS_H class TargetMachine; -class Pass; +class FunctionPass; -Pass *createPeepholeOptsPass(TargetMachine &Target); +FunctionPass *createPeepholeOptsPass(TargetMachine &Target); #endif diff --git a/include/llvm/CodeGen/RegisterAllocation.h b/include/llvm/CodeGen/RegisterAllocation.h index a0e5da8a75..572c325610 100644 --- a/include/llvm/CodeGen/RegisterAllocation.h +++ b/include/llvm/CodeGen/RegisterAllocation.h @@ -7,13 +7,13 @@ #ifndef LLVM_CODEGEN_REGISTERALLOCATION_H #define LLVM_CODEGEN_REGISTERALLOCATION_H -class Pass; +class FunctionPass; class TargetMachine; //---------------------------------------------------------------------------- // Entry point for register allocation for a module //---------------------------------------------------------------------------- -Pass *getRegisterAllocator(TargetMachine &T); +FunctionPass *getRegisterAllocator(TargetMachine &T); #endif diff --git a/include/llvm/Transforms/Scalar.h b/include/llvm/Transforms/Scalar.h index 2ee3c46cba..58dcd428ac 100644 --- a/include/llvm/Transforms/Scalar.h +++ b/include/llvm/Transforms/Scalar.h @@ -72,7 +72,7 @@ Pass *createScalarReplAggregatesPass(); // index of [0]). // This pass decomposes all multi-dimensional references in a function. -Pass *createDecomposeMultiDimRefsPass(); +FunctionPass *createDecomposeMultiDimRefsPass(); // This function decomposes a single instance of such a reference. // Return value: true if the instruction was replaced; false otherwise. @@ -238,7 +238,7 @@ extern const PassInfo *LoopPreheadersID; // These two passes convert malloc and free instructions to and from %malloc & // %free function calls. // -Pass *createLowerAllocationsPass(); +FunctionPass *createLowerAllocationsPass(); Pass *createRaiseAllocationsPass(); //===----------------------------------------------------------------------===// diff --git a/lib/CodeGen/InstrSched/InstrScheduling.cpp b/lib/CodeGen/InstrSched/InstrScheduling.cpp index e8778220cb..a6222d62a0 100644 --- a/lib/CodeGen/InstrSched/InstrScheduling.cpp +++ b/lib/CodeGen/InstrSched/InstrScheduling.cpp @@ -1491,6 +1491,6 @@ bool InstructionSchedulingWithSSA::runOnFunction(Function &F) } -Pass *createInstructionSchedulingWithSSAPass(const TargetMachine &tgt) { +FunctionPass *createInstructionSchedulingWithSSAPass(const TargetMachine &tgt) { return new InstructionSchedulingWithSSA(tgt); } diff --git a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp index fa81e9e33f..6d40e1d082 100644 --- a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp +++ b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp @@ -74,7 +74,7 @@ namespace { }; } -Pass *getRegisterAllocator(TargetMachine &T) { +FunctionPass *getRegisterAllocator(TargetMachine &T) { return new RegisterAllocator(T); } diff --git a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp index e8778220cb..a6222d62a0 100644 --- a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp +++ b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp @@ -1491,6 +1491,6 @@ bool InstructionSchedulingWithSSA::runOnFunction(Function &F) } -Pass *createInstructionSchedulingWithSSAPass(const TargetMachine &tgt) { +FunctionPass *createInstructionSchedulingWithSSAPass(const TargetMachine &tgt) { return new InstructionSchedulingWithSSA(tgt); } diff --git a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp index fa81e9e33f..6d40e1d082 100644 --- a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp +++ b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp @@ -74,7 +74,7 @@ namespace { }; } -Pass *getRegisterAllocator(TargetMachine &T) { +FunctionPass *getRegisterAllocator(TargetMachine &T) { return new RegisterAllocator(T); } diff --git a/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp b/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp index de04cb6517..b74c7df344 100644 --- a/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp +++ b/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp @@ -167,6 +167,6 @@ void InsertPrologEpilogCode::InsertEpilogCode(MachineFunction &MF) } } -Pass* UltraSparc::getPrologEpilogInsertionPass() { +FunctionPass *UltraSparc::getPrologEpilogInsertionPass() { return new InsertPrologEpilogCode(); } diff --git a/lib/Transforms/Scalar/DecomposeMultiDimRefs.cpp b/lib/Transforms/Scalar/DecomposeMultiDimRefs.cpp index 65cf465acd..79b6aead20 100644 --- a/lib/Transforms/Scalar/DecomposeMultiDimRefs.cpp +++ b/lib/Transforms/Scalar/DecomposeMultiDimRefs.cpp @@ -29,7 +29,7 @@ namespace { RegisterOpt<DecomposePass> X("lowerrefs", "Decompose multi-dimensional " "structure/array references"); -Pass +FunctionPass *createDecomposeMultiDimRefsPass() { return new DecomposePass(); diff --git a/lib/Transforms/Utils/LowerAllocations.cpp b/lib/Transforms/Utils/LowerAllocations.cpp index c5014b48e6..53584d9d3e 100644 --- a/lib/Transforms/Utils/LowerAllocations.cpp +++ b/lib/Transforms/Utils/LowerAllocations.cpp @@ -47,7 +47,7 @@ namespace { } // createLowerAllocationsPass - Interface to this file... -Pass *createLowerAllocationsPass() { +FunctionPass *createLowerAllocationsPass() { return new LowerAllocations(); } |