diff options
author | Owen Anderson <resistor@mac.com> | 2010-09-23 22:44:10 +0000 |
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committer | Owen Anderson <resistor@mac.com> | 2010-09-23 22:44:10 +0000 |
commit | 5716180b1a863d345127fa8f9dfe0a931ab7370c (patch) | |
tree | a4ef16abce9e17a85b87603a5ba0cae14349546d /utils/TableGen | |
parent | 823d9a53a426a2612bd73eda610fee75962ebd05 (diff) |
Add an TargetInstrDesc bit to indicate that a given instruction is a conditional move.
Not intended functionality change, as nothing uses this yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114702 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen')
-rw-r--r-- | utils/TableGen/CodeGenInstruction.cpp | 1 | ||||
-rw-r--r-- | utils/TableGen/CodeGenInstruction.h | 1 | ||||
-rw-r--r-- | utils/TableGen/InstrInfoEmitter.cpp | 1 |
3 files changed, 3 insertions, 0 deletions
diff --git a/utils/TableGen/CodeGenInstruction.cpp b/utils/TableGen/CodeGenInstruction.cpp index 01a1fe11f5..b36cf983a5 100644 --- a/utils/TableGen/CodeGenInstruction.cpp +++ b/utils/TableGen/CodeGenInstruction.cpp @@ -103,6 +103,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr) isBranch = R->getValueAsBit("isBranch"); isIndirectBranch = R->getValueAsBit("isIndirectBranch"); isCompare = R->getValueAsBit("isCompare"); + isConditionalMove = R->getValueAsBit("isConditionalMove"); isBarrier = R->getValueAsBit("isBarrier"); isCall = R->getValueAsBit("isCall"); canFoldAsLoad = R->getValueAsBit("canFoldAsLoad"); diff --git a/utils/TableGen/CodeGenInstruction.h b/utils/TableGen/CodeGenInstruction.h index b02d0d38f9..e2e29b16cf 100644 --- a/utils/TableGen/CodeGenInstruction.h +++ b/utils/TableGen/CodeGenInstruction.h @@ -124,6 +124,7 @@ namespace llvm { bool isBranch; bool isIndirectBranch; bool isCompare; + bool isConditionalMove; bool isBarrier; bool isCall; bool canFoldAsLoad; diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp index 4d3aa5e621..ce066b96c0 100644 --- a/utils/TableGen/InstrInfoEmitter.cpp +++ b/utils/TableGen/InstrInfoEmitter.cpp @@ -274,6 +274,7 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num, if (Inst.isBarrier) OS << "|(1<<TID::Barrier)"; if (Inst.hasDelaySlot) OS << "|(1<<TID::DelaySlot)"; if (Inst.isCall) OS << "|(1<<TID::Call)"; + if (Inst.isConditionalMove) OS << "|(1<<TID::ConditionalMove)"; if (Inst.canFoldAsLoad) OS << "|(1<<TID::FoldableAsLoad)"; if (Inst.mayLoad) OS << "|(1<<TID::MayLoad)"; if (Inst.mayStore) OS << "|(1<<TID::MayStore)"; |